Design & Reuse
5418 IP
101
200.0
MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
102
200.0
Compute Express Link (CXL) 3.1 Controller
The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....
103
200.0
LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5
The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...
104
200.0
LPDDR5T / LPDDR5X / LPDDR5 Controller
The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput ...
105
200.0
True Random Number Generator
The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...
106
200.0
RT-6xx CryptoManager Root of Trust
The Rambus CryptoManager RT-6xx v3 Root of Trust (CMRT) family from is the latest generation of fully programmable FIPS 140-3 compliant hardware secur...
107
200.0
RT-7xx CryptoManager Root of Trust
The Rambus automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 complian...
108
195.0
PCIe 7.0 Retimer Controller
The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...
109
195.0
PCIe 7.0 Switch
The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...
110
190.0
PCIe 6.1 Controller
The Rambus PCI Express® (PCIe®) 6.1 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 5...
111
190.0
PCIe 6.2 Switch
The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...
112
190.0
MIPI CSI-2 Controller Core V2
The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...
113
190.0
MIPI DSI-2 Controller Core
The Rambus DSI-2 Controller Core is the second generation DSI controller core. It is further optimized for high performance, low power and small size....
114
180.0
HBM3E / HBM3 Memory Controller
The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...
115
180.0
PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controlle...
116
180.0
GDDR6 Memory Controller
Rambus GDDR6 Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The ...
117
180.0
Quantum Safe Engine (QSE)
Quantum Safe Cryptography acceleration to protect data and devices in the quantum computing era...
118
180.0
Multi-Protocol Crypto Engine with Classification
The EIP-197 is a family of high speed Cryptographic Accelerators with embedded Classification Engine, Virtualization, Latency compensation to maintain...
119
180.0
Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACsec up to 10 Gbps in mu...
120
170.0
PCIe 5.0 Customizable Embedded Multi-port Switch
Rambus PCIe 5.0 Multi-port Switch is a customizable, Embedded PCIe Switch designed for ASIC and FPGA implementations enabling the connection of one u...
121
160.0
PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...
122
150.0
Compute Express Link (CXL) 2.0 Controller
Rambus Compute Express Link (CXL) 2.0 Controller leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache a...
123
150.0
Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications
The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...
124
150.0
Synopsys 1.6T Ethernet MAC IP
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
125
102.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps
The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
126
102.0
MIPI C-PHY/D-PHY Combo RX IP 4.5Gsps/4.5Gbps in TSMC N7
The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
127
102.0
MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...
128
102.0
Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
129
102.0
Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
130
100.0
7-bit, 64 GSPS ADC Ultra Low Power
The ODT-ADS-7B64G-3 is an ultra-high-bandwidth time-interleaved ADC designed in a 3nm CMOS process. This 7-bit, 64GSPS ADC supports ac-coupled inpu...
131
100.0
1.6T Ethernet PCS IP
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
132
100.0
1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
133
100.0
1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP
The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...
134
100.0
200G and 400G Ethernet PCS IP
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...
135
100.0
800G Ethernet PCS IP
The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...
136
100.0
112G Ethernet PHY in TSMC (N7, N6, N5, N3P)
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
137
100.0
224G Ethernet PHY in TSMC (N3E, N2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
138
100.0
CAN FD Bus Controller
CAN FD Bus Controller IP is an extension of Classical CAN Bus IP that addresses the increasing need for higher data rates and larger payload sizes. It...
139
100.0
Scalable, On-Die Voltage Regulation for High Current Applications
The Aeonic Power™ HC is a high-current, on-die voltage regulation solution that delivers local, distributed power, enabling fine-grained Dynamic Volta...
140
100.0
PCIe 6.0 PHY in Samsung (SF5A, SF4X, SF2)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
141
100.0
PCIe 6.0 PHY in TSMC (N6, N5, N4P, N4C, N3P, N3E)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
142
100.0
PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N3C, N2P)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
143
100.0
PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
144
100.0
UCIe PHY & D2D Adapter
Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...
145
100.0
UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
146
100.0
UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
147
100.0
UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
148
100.0
SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller
Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...
149
100.0
Adaptive Clock Generation Module for DVFS and Droop Response
The Movellus™ Aeonic Generate AWM3 high-performance clock generation IP product is part of the Aeonic digital IP product family. Designed for Droop Mi...
150
100.0
Aeonic Generate Digital PLL for multi-instance, core logic clocking
The Movellus™ high-performance Aeonic Generate Clock Generation Module (CGM) is a high-quality digital PLL that enables distributed clocking for per-c...