51 170.0

PCIe 5.0 Customizable Embedded Multi-port Switch Rambus PCIe 5.0 Multi-port Switch is a customizable, Embedded PCIe Switch designed for ASIC and FPGA implementations enabling the connection of one u...

52 160.0

HBM3E / HBM3 Memory Controller The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...

53 160.0

PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...

54 150.0

DDR5 MRDIMM for TSMC Lowest latency and highest data rates for data-intensive applications Cadence Design IP solutions offer world-class DDR PHY and controller memory I...

55 150.0

PHY for PCIe 7.0 for TSMC The Cadence PHY IP for PCI Express (PCIe) 7.0 delivers a data rate of up to 128Gbps in PAM4 mode. Designed specifically for Infrastructure and data ce...

56 150.0

High Bandwidth Memory (HBM4E) PHY for TSMC Designed for performance and low latency in AI/ML, HPC, data center and graphics applications The High-Bandwidth Memory generation (HBM4/4E) PHY is...

57 150.0

UltraLink Controller Ultralink controller for high performance die-to-die interconnect on streaming, CXS, and AXI protocols The Cadence Ultralink Controller enables a p...

58 150.0

Compute Express Link (CXL) 2.0 Controller Rambus Compute Express Link (CXL) 2.0 Controller leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache a...

59 150.0

Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...

60 150.0

LPDDR6/5X Memory PHY for TSMC Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...

61 150.0

eUSB2V2 PHY for TSMC Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripheral...

62 150.0

Synopsys 1.6T Ethernet MAC IP The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...

63 120.0

6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block Alphacore offers proven 6-12-bit analog to digital converters (ADC) intellectually property (IP) design blocks with the industry's best low-power and ...

64 120.0

4-16-bit, Gen Digital-to-Analog Converter (DAC) IP block Alphacore offers proven 4-16-bit digital-to-analog converters (DAC) intellectually property (IP) design blocks with the industry's best low-power and ...

65 102.0

MIPI C-PHY/D-PHY Combo CSI-2 RX IP 4.5Gsps/4.5Gbps in TSMC N7 The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...

66 102.0

MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

67 102.0

MIPI C-PHY/D-PHY Combo DSI TX+ IP 4.5Gsps/4.5Gbps in TSMC N5 The MXL-CDPHY-4p5G-DSI-TX+-T-5N is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

68 102.0

Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...

69 102.0

Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5 The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...

70 100.0

7-bit, 64 GSPS ADC Ultra Low Power The ODT-ADS-7B64G-3 is an ultra-high-bandwidth time-interleaved ADC designed in a 3nm CMOS process. This 7-bit, 64GSPS ADC supports ac-coupled inpu...

71 100.0

1.6T Ethernet PCS IP The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

72 100.0

1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...

73 100.0

1.6T Ultra Ethernet IP Solution with PHY, Controller and Verification IP The Synopsys 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ethernet controllers, silicon-proven 224G Ethernet PHY IP, and...

74 100.0

200G and 400G Ethernet PCS IP The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...

75 100.0

800G Ethernet PCS IP The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...

76 100.0

100MHz-13.5GHz, Gen Phase-Locked Loop (PLL) IP block Alphacore offers proven 100MHz to 13.5GHz Phase-Locked Loop (PLL) intellectually property (IP) design blocks with the industry's best core offerings w...

77 100.0

10G-100G MACsec Security Module for Ethernet Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...

78 100.0

112G Ethernet PHY in TSMC (N7, N6, N5, N3P) The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

79 100.0

224G Ethernet PHY in TSMC (N3P, N2P) The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

80 100.0

224G-LR SerDes PHY for TSMC 224G-LR SerDes PHY enables 1.6T and 800G networks The ever-increasing bandwidth in high-performance computing (HPC) applications is driving the rap...

81 100.0

CAN FD Bus Controller CAN FD Bus Controller IP is an extension of Classical CAN Bus IP that addresses the increasing need for higher data rates and larger payload sizes. It...

82 100.0

Scalable, On-Die Voltage Regulation for High Current Applications The Aeonic Power™ HC is a high-current, on-die voltage regulation solution that delivers local, distributed power, enabling fine-grained Dynamic Volta...

83 100.0

PCIe 5.0 Integrity and Data Encryption Security Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

84 100.0

PCIe 6.0 Integrity and Data Encryption Security Module PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...

85 100.0

PCIe 6.0 PHY in Samsung (SF5A, SF4X, SF2) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

86 100.0

PCIe 6.0 PHY in TSMC (N6, N5, N4P, N4C, N3P, N3E) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...

87 100.0

PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N3C, N2P) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

88 100.0

PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...

89 100.0

UCIe PHY & D2D Adapter Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...

90 100.0

UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

91 100.0

UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

92 100.0

UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3) Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...

93 100.0

SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...

94 100.0

Adaptive Clock Generation Module for DVFS and Droop Response The Movellus™ Aeonic Generate AWM3 high-performance clock generation IP product is part of the Aeonic digital IP product family. Designed for Droop Mi...

95 100.0

HDCP 2.3 Embedded Security Modules on DisplayPort/USB Type-C The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...

96 100.0

Aeonic Generate Digital PLL for multi-instance, core logic clocking The Movellus™ high-performance Aeonic Generate Clock Generation Module (CGM) is a high-quality digital PLL that enables distributed clocking for per-c...

97 100.0

Ceva-Waves Bluetooth 6.0 Low Energy Baseband Controller / Link Layer, software and profiles Ceva-Waves Bluetooth Low Energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. It has been qualified for Bluetooth Core ...

98 100.0

1G-25G MACsec Security Module Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...

99 100.0

The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...

100 100.0

MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm) Arasan's MIPI C-PHY is designed and compliant with latest MIPI C-Phy Standards. The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited ch...