NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
SoC collaboration network signs agreement with CSIP

![]() ![]() | |
EE Times: Latest News SoC collaboration network signs agreement with CSIP | |
(08/26/2005 1:34 PM EDT) URL: http://www.eetimes.com/showArticle.jhtml?articleID=170100778 | |
SAN FRANCISCO — Design and Reuse (D&R), a global collaboration network for sharing system-on-chip (SoC) design resources, said Friday that it has formed a partnership with China Software and Integrated Circuit Platform (CSIP). The agreement includes a secure entry portal from CSIP to D&R. The agreement also includes a cooperation plan for completing a database, enhancing provider visibility, organizing common events and training. "I am delighted to see that intellectual property in electronic design contributes to create a connected world," said Gabriele Saucier chair of D&R, in a statement. "We hope to open more market opportunities to D&R partner companies and enlarge the community of 37,000 registered users of our portal." Yanhui Wang, general manager of CSIP's IC business division, said the agreement with D&R would contribute to establishing appropriate links between CSIP and mature SoC players. CSIP is an institution through which the Chinese government guides the development of the software and IC industries and provides resources and technical services for innovation. D&R is partly owned by CMP Media LLC, which also owns EE Times.
| |
All material on this site Copyright © 2005 CMP Media LLC. All rights reserved. Privacy Statement | Your California Privacy Rights | Terms of Service | |

Related News
- Mentor Graphics Signs Multi-year Agreement with ARM for Early Access to ARM IP to Accelerate SoC Verification, Implementation and Testing
- Synopsys Signs Multiyear Collaboration Agreement with ARM for Early Software Development for ARMv8 Processors
- Intel Corporation Signs $20 Million Multi-Year License Agreement for Sonics System IP for SoC Platform Initiatives
- ChipX Purchases OKI's U.S. ASIC Business Assets and Signs Business Collaboration Agreement
- Toshiba Signs Comprehensive Agreement To Use ARM PrimeCell IP In High Performance SoC Design
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |