All three EDA vendors today used the Design Automation Conference (DAC) in San Francisco to announce the addition of Intel Foundry's embedded multi-die interconnect bridge (EMIB) advanced packaging technology into their design reference flows.
beta.embedded.com/, Jun. 24, 2024 –
All three EDA vendors today used the Design Automation Conference (DAC) in San Francisco to announce the addition of Intel Foundry's embedded multi-die interconnect bridge (EMIB) advanced packaging technology into their design reference flows.
We've published the three items separately as this was part of broader announcements, but here's a quick summary of each vendor's focus on the 3D IC, multi-die, or heterogeneous system design support for EMIB.
Synopsys said it now has production-ready multi-die reference flow, powered by its Synopsys.ai EDA suite, and Synopsys IP for Intel Foundry's EMIB advanced packaging technology. The optimized reference flow provides a unified co-design and analysis solution, enabled by Synopsys 3DIC Compiler to accelerate exploration and development of multi-die designs at all stages from silicon to systems. In addition, Synopsys 3DSO.ai is natively integrated with Synopsys 3DIC Compiler, enabling optimization for signal, power and thermal integrity with productivity gains and system performance. A summary of Synopsys' announcement is here.
Cadence said its complete AI-driven flow, with its Integrity 3D-IC platform integrating Allegro X advanced package designer (APD), Sigrity technologies, Clarity 3D Solver, Pegasus Verification System, and Virtuoso Studio, constitutes Intel's advanced packaging reference flow that leverages its EMIB technology and is optimized to work seamlessly with Intel 18A technology. The advanced EMIB 2.5D reference flow enables customers to successfully complete full-flow heterogeneous designs, seamlessly transitioning from system-level planning, physical optimization and analysis to DRC-aware implementation and physical signoff. A summary of Cadence's announcement is here.
Siemens announced the availability of the EMIB reference flow that can help Intel Foundry's early customers utilize the foundry's embedded multi-die interconnect bridge (EMIB) approach to in-package, high-density interconnect of heterogeneous chips. With the delivery of this Intel Foundry EMIB workflow, Siemens said Intel Foundry's customers can tackle the full range of critical tasks needed for a successful design and tape-out. Driven by an Intel Foundry developed and supplied Package Assembly Design Kit (PADK), Intel Foundry's EMIB customers can also leverage Siemens' Calibre nmPlatform to validate the EMIB silicon layouts for DRC, LVS, and 3DThermal analysis. A summary of Siemens' announcement is here