Magillem Registers is all about speeding up the design of hardware-software interfaces in complex, large-scale SoCs.
www.electronicdesign.com, May. 28, 2025 –
In today’s semiconductor landscape, scale is becoming a bigger battleground—not only for chipmakers, but increasingly for hyperscalers, cloud giants, and other systems companies, too. They're all racing to roll out a new class of ultra-large systems-on-chips (SoCs), cramming tens of billions of transistors and incorporating a wide range of IP blocks to handle computationally heavy workloads, such as AI training and inferencing.
In many cases, these chips are breaking out of the limits of monolithic chips, integrating heterogeneous dies or "chiplets" using 2.5D and 3D packaging technologies. But the real value of the hardware ultimately hinges on the software stack that runs on top of it. The hardware-software interface, or HSI, plays a central role in a modern chip design, linking the physical hardware and the software and firmware that executes on top of it.
Bridging the gap, however, is becoming a bigger challenge, said K. Charles Janac, the CEO of Arteris. "Effectively addressing hardware and software integration has become quite a challenge for SoC teams, particularly given added complexity and growing chip sizes driven by the infusion of AI logic."
Arteris introduced its latest electronic design software, Magillem Registers, to cut through the complexity. The company said the EDA tool automates the hardware-software integration process, reducing the development time by up to 35% compared to existing solutions. By bringing up to 3X faster performance and 5X more capacity for larger chip designs, Arteris explained that it can help engineers quickly develop chips and chiplets ranging from IoT devices to complex AI multi-die SoCs for data centers. Click here to read more