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Design Platform and Service News

• Vayavya Labs and Tenstorrent Partner to Accelerate RISC-V Hardware and Software Development Through Virtual Platform Modeling (Thursday, October 8, 2026)
• Synopsys Expands Agentic AI Across Semiconductor Design With AgentEngineer and Autopilot (Monday, October 5, 2026)
• OpenAI and Synopsys Announce GPT-Synopsys: Frontier Intelligence to Revolutionize Chip Design (Thursday, October 1, 2026)
• Synopsys and Amazon Announce Strategic, Multi-year IP Agreement for Custom Silicon; Collaboration Also Extends to Cloud and AI-Powered Engineering (Thursday, October 1, 2026)
• Synopsys Powers Autonomous Engineering with a Broad Portfolio of Long-Horizon Agents and Autopilot Platform (Thursday, October 1, 2026)
• MIPS and Xcelsa Collaborate to Accelerate Verified, Workload-Optimized Custom Silicon (Thursday, October 1, 2026)
• Siemens accelerates physical testing with Simcenter Testlab (Thursday, October 1, 2026)
• aiMotive and Cadence Demonstrate Layer-by-Layer Workload Placement Across Independent AI Engines (Monday, September 28, 2026)
• Alchip collaborates with Synopsys to Address Scale Up and Out Bandwidth Constraints (Monday, September 28, 2026)
• Cadence Expands ChipStack AI Super Agent with a New Agent for RTL Generation and Early PPA Optimization (Wednesday, September 23, 2026)
• TDK-Micronas adopts Aniah’s AI-powered OneCheck® platform to advance automotive semiconductor development (Monday, September 21, 2026)
• IonQ and Synopsys Report Up to 14.6% Faster Engineering Simulations (Monday, September 21, 2026)
• Keysight EDA Software Expands Access for European Chip Startups (Wednesday, September 16, 2026)
• Synopsys Integrates Chip-to-System Design After Ansys Acquisition (Wednesday, September 16, 2026)
• SoC PLANNER: A New Generation of Automated SoC Design Exploration Managing Cost-Effectiveness and Sustainability (Thursday, September 10, 2026)
• Overcoming the thermal barrier in next-generation AI ASICs (Monday, September 7, 2026)
• proteanTecs and MegaChips Collaborate to Bring Health and Performance Management Solutions to Next-Generation LSI Designs (Monday, September 7, 2026)
• IBM and Arm: Expanding the Arm ecosystem for the next era of enterprise computing (Monday, August 31, 2026)
• Cadence Design Systems Sees AI Agents Driving Chip Design Boom and Growth (Monday, August 31, 2026)
• Keysight Helps AttoTude Cut Terahertz IC Design Cycles by More Than 50% (Monday, August 31, 2026)
• Siemens EDA Tools Now Certified for Intel 14A, 18A-P Process Technologies (Monday, August 31, 2026)
• Silvaco Announces Partnership with Dassault Systèmes to Advance First-Time-Right Semiconductor Manufacturing (Thursday, August 20, 2026)
• Samsung accelerates SoC design in South Korea with Claude, narrowing Qualcomm gap (Monday, August 17, 2026)
• Racyics and Cloudberry VC give European Fabless Startups a complete Path from Design to Silicon (Monday, August 17, 2026)
• Eight Companies Shaping India’s Semiconductor Design Ecosystem (Thursday, August 13, 2026)
• Siemens EDA Says AI Can Cut Chip Design Time by Up to 10x (Thursday, August 13, 2026)
• Siemens Automates Chip Design with AI Agents: "Verification and Fixes While Engineers Sleep" (Thursday, August 13, 2026)
• Joinsilicon's AI ASIC Chip Design Platform Rated as Internationally Advanced Level (Thursday, August 13, 2026)
• Cadence Develops Agentic AI Platform for PCB Design (Monday, August 10, 2026)
• Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A (Tuesday, July 28, 2026)
• Synopsys Advances Agentic AI Chip Design with AMD and Microsoft (Tuesday, July 28, 2026)
• Silvaco to Accelerate Physics-Based Digital Twins for Semiconductor Design and Manufacturing Using NVIDIA AI and Accelerated Computing (Monday, July 27, 2026)
• AI in EDA Is Real, It’s Now, and It’s on Show at DAC 2026 (Monday, July 27, 2026)
• Siemens advances self-verifying agentic AI workflows for semiconductor and PCB design (Monday, July 27, 2026)
• True Circuits Announces the JSPICE™ Design Environment (JDE™) will be Offered to the JDE Ecosystem Open Source (Monday, July 27, 2026)
• Synopsys Enables AMD Instinct™ MI455X GPU Design with Comprehensive Multi-Die Solution (Friday, July 24, 2026)
• Real Intent Launches Riven™ Sign-Off AI Agent for 10X Faster Sign-Off (Friday, July 24, 2026)
• Keysight Addresses Cross-Domain Physics Issues That Leave Electronic Designs Vulnerable to Late-Stage Failure (Thursday, July 23, 2026)
• MEMTECH announces MemVerify-LPDDR5x memory simulation & verification platform (Monday, July 20, 2026)
• Cadence Introduces AuraStack AI Super Agent, the World’s First Agentic AI Platform for PCB and Advanced Packaging (Monday, July 20, 2026)
• Defacto’s SoC Compiler Drastically Improved Productivity of L&T Semiconductor Technologies (Thursday, July 16, 2026)
• Keysight Targets the Hidden Cost of UI Test Authoring and Maintenance (Thursday, July 9, 2026)
• Nordic expands nRF Cloud with firmware vulnerability scanning (Monday, July 6, 2026)
• Keysight and WIN Semiconductors Collaborate to Cut Design Risk for High Frequency RF Components (Monday, July 6, 2026)
• Electronics Digital Twin platform from Synopsys for accelerating physical AI development (Monday, July 6, 2026)
• Real Intent Meridian CDC with Microarchitectural Analysis (MA) Transforms Clock Domain Crossing Sign-Off (Wednesday, July 1, 2026)
• Murata and Synopsys collaborate to streamline simulation workflows for electronics designers (Monday, June 29, 2026)
• SNUG India 2026: Synopsys Unveils First Multiphysics Fusion Tools Since Ansys Deal (Thursday, June 25, 2026)
• Introducing Tessent UltraSight - a complete functional monitoring & debug solution for SoCs (Thursday, June 18, 2026)
• Synopsys Announces Availability of the First Wave of Multiphysics Fusion Solutions (Thursday, June 18, 2026)