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Design Platform and Service News

• The next EDA wave: Lessons from DATE 2026 (Monday, May 18, 2026)
• MIPI Alliance Launches Physical AI Birds of a Feather (BoF) Group Focused on Humanoids (Monday, May 18, 2026)
• Keysight and SRC UK Collaborate to Advance EW Modernization with Advanced Test and Simulation (Monday, May 18, 2026)
• IC Manage GDP-AI Transforms IP Lifecycle Management with Generative and Agentic AI (Friday, May 15, 2026)
• CEA-Leti Platform Offers Chipmakers Nanometre- Scale Strain Mapping (Thursday, May 14, 2026)
• Siemens democratizes EDA software access for European electronics industry through the Chips JU European Chips Design Platform (EuroCDP) project (Thursday, May 14, 2026)
• Siemens unveils AI-powered library characterization to accelerate semiconductor design (Thursday, May 14, 2026)
• LTSCT Expands Advanced Power Design Capabilities with Synopsys (Thursday, May 14, 2026)
• Siemens and Xometry partner to bring expanded AI-native supply chain intelligence to Siemens Xcelerator (Thursday, May 7, 2026)
• Accelerate Your Innovation: Why FPGA System on Modules (SoMs) Are the Strategic Choice (Thursday, May 7, 2026)
• Siemens hardware-assisted verification validates Arm AGI CPU for scalable agentic AI (Wednesday, May 6, 2026)
• Semifive Wins 3D IC Turnkey Design Deal for Edge AI Chip (Thursday, April 30, 2026)
• Silvaco Partners with ITRI to Support MCU Development and Startup Innovation (Monday, April 27, 2026)
• Atomera Extends Collaboration With Synopsys to Accelerate GaN Modeling in High-Value RF and Power Devices (Monday, April 27, 2026)
• Siemens accelerates AI chip verification to trillion‑cycle scale with NVIDIA technology (Monday, April 13, 2026)
• Keysight Adds Assembly Simulation to Virtual Manufacturing Portfolio (Monday, April 6, 2026)
• Synopsys Brings Agentic Engineering Into Focus as AI-Driven Design Tests Productivity Limits (Thursday, April 2, 2026)
• Arm expands compute platform to silicon products in historic company first (Monday, March 30, 2026)
• Siemens launches Teamcenter Digital Reality Viewer and Digital Twin Composer in India (Thursday, March 26, 2026)
• Verification Engineers Are Poised to Become Verification Scientists (Thursday, March 26, 2026)
• Synopsys' vision for engineering the future (Monday, March 23, 2026)
• Synopsys expands AI chip design stack with hardware-assisted verification, tightening development timelines (Monday, March 23, 2026)
• NVIDIA and Global Industrial Software Giants Bring Design, Engineering and Manufacturing Into the AI Era (Monday, March 23, 2026)
• Keysight Launches AI Inference Emulation Platform to Validate and Optimize AI Infrastructure (Thursday, March 19, 2026)
• Synopsys Outlines Vision for Engineering the Future (Thursday, March 19, 2026)
• Siemens launches Fuse EDA AI Agent for automation across semiconductor, 3D IC and PCB system workflows (Tuesday, March 17, 2026)
• AI Chip Design From Heilbronn (Monday, March 16, 2026)
• TES Unveils High-Performance 8/40MHz Oscillator and Clock Buffer IPs for Reliable On-Chip Timing Solutions for X-FAB XT018 - 0.18µm BCD-on-SOI technology. (Thursday, March 12, 2026)
• Movellus Partners with Synopsys to Deliver Power Efficiency for Next Generation IC’s (Thursday, March 12, 2026)
• Synopsys Launches Electronics Digital Twin Platform to Accelerate Physical AI System Development (Thursday, March 12, 2026)
• Linaro, Arm Launch CoreCollective Open Consortium (Monday, March 9, 2026)
• Innatera Selects Synopsys Simulation to Scale Brain-Inspired Processors for Edge Devices (Wednesday, March 4, 2026)
• Siemens accelerates integrated circuit design and verification with agentic AI in Questa One (Monday, March 2, 2026)
• Kaynes Semicon Pvt Ltd Adopts Advanced Simulation Solutions from Synopsys to Strengthen OSAT Capabilities (Thursday, February 26, 2026)
• Accelerating semiconductor and electronic systems design using AI-powered digital twins (Thursday, February 26, 2026)
• Baya Systems and Aion Silicon Partner to Accelerate Next-Generation SoC and Chiplet Designs (Thursday, February 26, 2026)
• ADTechnology and Fraunhofer IIS Join Forces for Advanced ASIC and Chiplet Development (Thursday, February 26, 2026)
• SmartDV and Mirabilis Design Announce Strategic Collaboration for System-Level Modeling of SmartDV IP (Monday, February 16, 2026)
• Compartmentalisation by Microservices (Thursday, February 12, 2026)
• Keysight Enables Enterprise-Scale AI Adoption in Semiconductor Design with SOS Enterprise (Thursday, February 12, 2026)
• FAMES pilot line inaugurated after delivering first validated semiconductor results (Monday, February 9, 2026)
• Indian Chip Design Services Provider Mirafra Tapes Out 22-nm SoC (Monday, February 2, 2026)
• Keysight’s Machine Learning Toolkit to Speed Device Modeling and PDK Dev (Monday, February 2, 2026)
• Keysight Launches Wireless Coexistence Test Solution to Accelerate Compliance and Innovation (Thursday, January 29, 2026)
• Frontgrade Gaisler is proud to be a part of the ePERFECT project (Monday, January 26, 2026)
• QuickLogic Announces Orders for Strategic Radiation Hardened FPGA Development Kit (Monday, January 26, 2026)
• Microservice Store Launches Embedded Microservices: The Foundational Technology for the Digital Marketplace in Embedded Systems (Monday, January 26, 2026)
• Siemens Introduces New Type of Digital Twin Software for SDV Development (Thursday, January 22, 2026)
• Keysight Joins Forces with Singapore's Quantum Leaders to Advance Capabilities in the Design and Control of Qubits (Thursday, December 18, 2025)
• Using Synopsys Tools, Complex AI SoC Achieves Verification in 5 Weeks (Thursday, December 18, 2025)