3D IC chiplet-based heterogeneous package integration represents the next major evolution in semiconductor design. It allows us to continue scaling system performance despite the physical limitationA sneak peak at 3D IC design toolkits and workflowss of traditional monolithic chip manufacturing. By breaking functional systems into sub-functional chiplets and using advanced packaging integration technologies, we can create more complex, more powerful systems than ever before.
www.edn.com, Sept. 16, 2025 –
The challenge—and opportunity—for the industry is to lower the barriers to adoption of 3D IC design so that its benefits can become available industry-wide and not just the bleeding edge markets. Thus, the Chiplet Design Exchange (CDX) was formed within the Open Compute Project with the mission of developing easy-to-use, machine-readable design kits (3DKs).
With participation from EDA vendors, foundries, OSATs, and materials providers, the goal was to define standards and workflows for 3D IC design. In other words, a neutral, open foundation that enables efficient chiplet integration and reuse, accelerates innovation, and guarantees manufacturability across organizational boundaries.
3D IC design toolkits and workflows
Silicon IC design is supported by a mature ecosystem of IP libraries and standardized process design kits, but advanced packaging has historically lacked a similar infrastructure. 3D IC design requires new, specialized design kits tailored for chiplet-based workflows and advanced package integration complexity.
The CDX group, together with industry partners, defined four primary 3DK categories, each supporting a discrete aspect of 3D IC design, integration, and verification:
Standardizing these kits in machine-readable, EDA-neutral formats closes persistent gaps between silicon, packaging, and test communities. Every stakeholder—whether chiplet vendor, package architect, or manufacturing partner—can contribute, access, and leverage accurate models for design, verification, and production handoff to manufacturing.
The wider availability of 3DKs is driving the emergence of new, fluid 3D IC workflows. Chiplet suppliers can now publish detailed, standards-compliant digital models, creating a catalog of validated IP. Designers can search, evaluate, and select chiplets based on electrical, physical, and performance characteristics—similar to how SoC developers choose IP blocks for traditional integration. This enhances discoverability, accelerates design cycles, and fosters a new business model for silicon IP reuse.
Crucial to this flow is automation in model authoring. Manually crafting CDX-compliant 3DKs at scale is not practical, so the industry is investing in open-source, EDA-neutral authoring tools. Siemens EDA Innovator3D IC exemplifies this trend, providing a unified environment where teams can design, verify, and plan manufacturing in one cockpit. These platforms enable rapid iteration, simulation, and validation of heterogeneous integration, helping organizations reduce costly design spins and reach the market faster.
The AI and 3D IC alliance
Artificial intelligence (AI) and high-performance computing (HPC) are both driving, and benefiting from, progress in 3D IC technology. As scaling of traditional process nodes approaches its physical limits, chiplet integration and advanced packaging become the primary pathways to higher performance and capacity. By stacking high-bandwidth memory near logic, designers achieve higher data transfer rates with reduced latency and power—vital for AI, hyperscalers, and data-intensive applications.
The industry is also crossing new thresholds: single-die reticle limits are being surpassed, and panel-scale organic and glass interposers now support the assembly of thousands of chiplets—resulting in systems with trillions of transistors on a single substrate. The complexity of designing, laying out, and verifying these massive architectures is well beyond the reach of traditional manual processes, especially as electrical, power, thermal, and mechanical dependencies multiply.
AI is therefore becoming an indispensable partner, not just another tool. Machine learning accelerates fundamental EDA tasks, such as SPICE simulation, by orders of magnitude and powers multi-dimensional optimization engines that explore a vast design space automatically. Recent advances allow even legacy tools to achieve significant productivity gains by learning from the design intent and usage patterns, automating and refining iterative processes to deliver greater productivity and better results.