Sept. 25, 2025 –
Sydney, Australia – September 25, 2025 – Perceptia Devices, a leader in low-jitter clocking IP, today announced the launch of its latest product, pPLL08N, a family of narrow-band RF phase-locked loops (PLLs) designed to complement the company’s widely adopted pPLL08W wide-band solution.
The new pPLL08N family delivers all the proven performance and reliability of the pPLL08W while offering customers a significantly reduced silicon area and optimised efficiency for narrow band frequency applications. By tailoring the design to operate within more specific frequency ranges, pPLL08N enables cost-sensitive and space-constrained designs without sacrificing any of the quality or stability that Perceptia PLLs are known for.
pPLL08N is available in three variants, each covering a different portion of the spectrum. Collectively, the three variants span the full frequency range of pPLL08W, giving designers the flexibility to choose the option that best matches their system requirements while conserving valuable die area.
The first implementation of pPLL08N will be in GlobalFoundries 22FDX process where pPLL08N is derived from the silicon proven pPLL08W.
| Parameter | pPLL08W | pPLL08N |
| Primary Output Frequency Range (Lower frequencies available by internal division) | 5.25MHz – 10.6GHz | LO: 5.3GHz – 6.7GHz MID: 6.7GHz – 8.5GHz HI: 8.5GHz – 10.6GHz (Three variants) |
| Integrated RMS Jitter (12kHz – 20MHz) | < 200fs | < 200fs |
| Area | 0.23mm2 | 0.10mm2 |
“pPLL08N extends our PLL portfolio to give customers more targeted design choices,” said Julian Jenkins, CEO of Perceptia Devices. “Where pPLL08W provides broad frequency coverage in a single instance, pPLL08N allows engineers to select a smaller, narrower-band solution that reduces area for designs that don’t need the full range.”
With the addition of pPLL08N, Perceptia now offers a more complete portfolio of PLL solutions optimised for diverse applications, from wide-band flexibility to highly efficient narrow-band implementations.
pPLL08N is a compact, LC tank based, RF phase-locked loop (PLL) IP core, optimised for advanced process nodes. Designed for use in a wide range of wireless and communication applications, such as WiFi, with a narrow range of carrier frequencies are required, it delivers superior phase noise and integration flexibility. pPLL08N enables designers to confidently implement advanced timing architectures without compromising on area or power.
Perceptia Devices is an IP and design services provider, based in Sydney, Australia. With a focus on PLLs and precision timing, Perceptia supports customers across a wide range of applications including wireless communications, AI/ML, data converters, IoT, and mixed-signal SoCs with high performance, low area PLLs. For more information or to request the datasheet, please contact: