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Design IP News
Creonic Releases DVB-S2X Demodulator Version 6.0 with Increased Bitwidth and Annex M Support
(Thursday, July 31, 2025)
Perceptia Releases Design Kit for pPLL05 on GlobalFoundries 22FDX Platform
(Thursday, July 31, 2025)
Next-Gen High-Speed Transceiver IP Core Unveiled: Power, Performance, and Protocol Versatility in One Core
(Monday, July 28, 2025)
Mixel Supports Automotive SerDes Alliance (ASA) Motion Link SerDes IP
(Wednesday, July 23, 2025)
Arteris Selected by Whalechip for Near-Memory Computing Chip
(Tuesday, July 22, 2025)
EnSilica cuts post-quantum cryptography (PQC) silicon area with three-in-one IP block
(Monday, July 21, 2025)
12-bit 5Msps High-Speed, Silicon-Proven ADC IP Core Available for Immediate Licensing
(Monday, July 21, 2025)
Cadence Races First to Release LPDDR6/5X Memory IP for AI Infrastructure
(Friday, July 18, 2025)
Perceptia Devices Release pPLL08W, best-in-class RF PLL IP in GF22FDX
(Thursday, July 17, 2025)
Innosilicon Scales LPDDR5X/5/4X/4 and DDR5/4 Combo IPs to 28nm and 22nm, Cementing Its Position as the "One Stop" for Memory Interface Solutions
(Thursday, July 17, 2025)
InPsytech Tapes Out F2F SoIC Design Compliant with UCIE 2.0 Standard Enabling High-Speed Interconnects for 3D Heterogeneous Integration
(Wednesday, July 16, 2025)
GUC Tapes Out Industry-Leading UCIe Face-Up IP for TSMC SoIC-X
(Tuesday, July 15, 2025)
JEDEC Releases New LPDDR6 Standard to Enhance Mobile and AI Memory Performance
(Friday, July 11, 2025)
Arasan Announces immediate availability of its Total IP for Embedded USB2 (eUSB2) with Controller and PHY
(Friday, July 11, 2025)
Cadence Introduces Industry-First LPDDR6/5X 14.4Gbps Memory IP to Power Next-Generation AI Infrastructure
(Wednesday, July 9, 2025)
Custom ASIC Design for CGM, TPMS & SATCOM applications from T2M-IP
(Wednesday, July 9, 2025)
PUFsecurity, a subsidiary of eMemory, Achieves NIST CAVP Certification for PQC Algorithms, Launches PUFpqc Architecture for Quantum-Resilient SoCs
(Tuesday, July 8, 2025)
Ethernet IP Core for Next-Gen Automotive SoCs: Complementing CAN, LIN, and FlexRay with Scalable Connectivity
(Monday, June 30, 2025)
CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
(Friday, June 27, 2025)
FH (Frequency Hopping) - OFDM Modem Available For Immediate Implementation From Global IP Core
(Friday, June 27, 2025)
VeriSilicon Expands DSP Portfolio with Silicon-Proven ZSP5000 Vision Core Series for Edge Intelligence
(Thursday, June 26, 2025)
eMemory's NeoFuse OTP Qualifies on TSMC's N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
(Thursday, June 26, 2025)
Sofics Delivers Remarkable PPA & R Performance Near Physical Limits on TSMC 2nm Technology
(Wednesday, June 25, 2025)
AMD will launch PCIe 6.0 devices next year but consumers will have to wait almost half a decade to get it - here's why
(Tuesday, June 24, 2025)
Ceva Launches MotionEngine™ Hex: Bringing Precise, Touch-Free, Spatial Control to Smart TV, Gaming, and IoT Interfaces
(Tuesday, June 24, 2025)
Creonic's DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard
(Tuesday, June 24, 2025)
Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC's 22nm Platform
(Tuesday, June 24, 2025)
SignatureIP Unveils Industry-Leading CXL 3.2 Solution for High-Performance Computing
(Monday, June 23, 2025)
Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets
(Monday, June 23, 2025)
Certified Automotive Ethernet, CAN XL, and LIN IP Cores Proven, Qualified, and Ready for Seamless Integration
(Monday, June 23, 2025)
True Circuits Announces New and Improved Low-jitter Digital Ultra+ PLL that Offers Exceptional Performance, Features and Ease of Use
(Monday, June 23, 2025)
True Circuits Introduces the Low-jitter Digital Ultra+ PLL at the Design Automation Conference
(Friday, June 20, 2025)
CAST Launches Multi-Channel DMA IP Core Ideal for Streaming Applications
(Thursday, June 19, 2025)
DCD-SEMI Joins MIPI Alliance and Unveils Latest I3C IP at MIPI Plugfest Warsaw 2025
(Wednesday, June 18, 2025)
Arteris Accelerates AI-Driven Silicon Innovation with Expanded Multi-Die Solution
(Tuesday, June 17, 2025)
SmartDV Introduces Advanced H.264 and H.265 Video Encoder and Decoder IP
(Monday, June 16, 2025)
Advanced MIPI IP Cores for Automotive, IoT, Consumer, Imaging & Display SoCs
(Monday, June 16, 2025)
Alphawave Semi at the Forefront of PCIe® 7.0 Specification: Showcasing Next-Gen Chiplet Interoperability and Optical PCIe Technology at PCI-SIG® Developers Conference 2025
(Thursday, June 12, 2025)
I3C: The Next-Generation Serial Communication Bus
(Wednesday, June 11, 2025)
Synopsys Achieves PCIe 6.x Interoperability Milestone with Broadcom's PEX90000 Series Switch at PCI-SIG DevCon 2025
(Wednesday, June 11, 2025)
Imec presents 150 GSa/s Digital-to-Analog Converter (DAC) achieving 300 Gb/s data transmission
(Wednesday, June 11, 2025)
Synopsys Achieves PCIe 6.x Interoperability Milestone with Broadcom's PEX90000 Series Switch at PCI-SIG DevCon 2025
(Wednesday, June 11, 2025)
VeriSilicon's AI-ISP Custom Chip Solution Enables Mass Production of Customer's Smartphones
(Wednesday, June 11, 2025)
CFX's 130nm EEPROM IP Passes Customer Product-Level Evaluation, Ready for Mass Commercial Adoption
(Wednesday, June 11, 2025)
IP Cores, Inc. ships new FFT4T Streaming Multi-Channel FFT Core
(Wednesday, June 11, 2025)
Faraday Unveils FlashKit™-22RRAM: an eNVM-based SoC Development Platform for IoT
(Tuesday, June 10, 2025)
Silicon Proven DisplayPort 1.4 Tx & Rx PHY IP Cores, Ready to license in 12/28/40/55nm
(Tuesday, June 10, 2025)
sureCore launches comprehensive suite of silicon services
(Tuesday, June 10, 2025)
Qualitas Semiconductor Successfully Develops UCIe v2.0-Compliant PHY IP, Enabling Up to 512Gbps Die-to-Die Connectivity
(Tuesday, June 10, 2025)
VeriSilicon's Ultra-Low Energy NPU Provides Over 40 TOPS for On-Device LLM Inference in Mobile Applications
(Tuesday, June 10, 2025)
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