Design & Reuse

Tenstorrent Productizes RISC-V CPU And AI IP

www.eetimes.com, Sept. 25, 2025 – 

AI chip startup Tenstorrent has begun productizing its RISC-V CPU and AI cores as licensable IP. Tenstorrent already has IP licensees, including LG and Hyundai, with most of the company’s bookings to date coming from IP deals, Aniket Saha, vice president of product strategy at Tenstorrent, told EE Times.

“We are the only company I know of that uses its own IP product in its own chips,” Saha said.

Contrary to the widely held industry belief that offering both silicon and its IP would create a conflict, this hasn’t been a problem for customers so far, in part because they are either customizing the IP or addressing different markets (specifically, automotive), Saha said.

“I’ve been pleasantly surprised that customers actually want the IP we are using in our own products because we are betting our company on the IP,” he said. “That has been an accelerant for the IP we are building.”

Tenstorrent will also license IP to companies planning to build silicon products that compete with its own workstation and data center hardware products, Saha confirmed. “Customers will often build things slightly differently,” he said. “They can build complementary products, even if they are in the same market.”

One emerging customer is planning to do just this – build something very similar to Tenstorrent hardware, but with different memory configurations and other design choices, Saha said.

“Even in that data center space where our main business is, you could build ancillary products and not compete with us because of different core counts or configurations, so we are not seeing that much conflict,” he said. “Even if there is some conflict, we’d get royalties in the back end – we’d rather win royalties in the back end than not win anything at all.”

Saha said he sees Arm as the primary competition for Tenstorrent’s IP products, largely because they are the incumbent, versus other RISC-V IP vendors like Andes. “We welcome more high-end CPU IP vendors, because that makes the RISC-V story stronger,” he said. “For RISC-V, and us, to succeed, we need credible high-end CPU IP companies.”

Competition also comes from ground-up in-house designs, Saha said, but mainly for mid-range cores or very specific implementations.

Differentiation for Tenstorrent IP products in general includes the company’s commitment to open-sourcing as much as possible and its willingness to let its cores be customized. IP companies don’t typically allow modifications beyond configuration options, because it makes the IP very difficult to support.

“We saw, starting with sovereign compute markets, a strong pull coming in for using the IP and being able to take full control,” Saha said. “If our customer wants to modify [the IP], we provide them the entire code base, the infrastructure that is required to modify, and build on top of that. We call it the innovation license, and this has quite a lot of company pickup right now.”

In general, however, customers will be steered away from customization, depending on the internal engineering resources available at any given time, Saha said.

“Because it’s early days, we’ve accepted some customers who wanted [us to make] modifications [to the IP],” Saha said. “But we will phase out doing the direct customization or heavy customizations. Whenever there is heavy customization, we are hoping the customer will pick it up.”

A lot of traction for IP products is coming from Asia, particularly China, with US interest “slow” so far, Saha said.

Ascalon CPU cores

The first generation of Tenstorrent RISC-V CPU, Ascalon, will have its IP productized in implementations between 10 and 20 SPECint2006/GHz. Released today are the largest and the third largest. The largest, Ascalon-X, will compete with Arm’s Neoverse V2 and V3 cores, Saha said. The third largest, Ascalon-S, competes roughly with Arm Cortex-A78.

Verified, validated subsystems with configurable clusters between 2 and 8 Ascalon cores will also be available. Ascalon interfaces are specified to be drop-in replacements for Arm (cores have both coherent and non-coherent interfaces).

Tenstorrent is moving to an 18-month cadence with generations of these cores, with the next generation, Babylon, set to improve performance, frequency, and PPA.

An automotive version of the CPU, Alexandria, adds a feature set for automotive functional safety. This also opens up markets like industrial and medical.

“Because [industrial and medical] volumes are typically low, Arm traditionally does not go after those sockets,” Saha said. “We see ways to aggregate some of that volume.” 

A development board, Atlantis, will feature an 8-core Ascalon-X CPU with a 50-W TDP. This development board will be used by OEMs, automotive tier 1s, and ISVs to begin porting software that requires high single-thread performance.

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