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RISC-V News
CAST looks to simplify RISC-V IP adoption with new program
(Monday, October 27, 2025)
RISC-V Takes First Step Toward International Standardization as ISO/IEC JTC1 Grants PAS Submitter Status
(Monday, October 27, 2025)
RISC-V Exceeding Expectations in AI, China Deployment
(Thursday, October 23, 2025)
Upbeat Technology’s RISC-V MCU Takes Flight With Near-Threshold Computing
(Thursday, October 23, 2025)
Arteris and Alibaba DAMO Academy Extend Partnership to Accelerate High-Performance RISC-V SoC Designs
(Wednesday, October 22, 2025)
Upbeat Technology’s RISC-V MCU Takes Flight With Near-Threshold Computing
(Monday, October 20, 2025)
Andes Showcases Expanding RISC-V Ecosystem and Next-Generation "Cuzco" High-Performance CPU at RISC-V Summit North America 2025
(Monday, October 20, 2025)
Breker Donates Advanced Test Suite Components to RISC-V International for Use in Future Compliance Activities
(Thursday, October 16, 2025)
RISC-V set to announce 25% market penetration - open-standard ISA is ahead of schedule, securing fast-growing silicon footprint
(Thursday, October 9, 2025)
Europe Achieves a Key Milestone with the Europe's First Out-of-Order RISC-V Processor chip, with the eProcessor Project
(Thursday, October 9, 2025)
What Meta's Purchase of Rivos Says About RISC-V
(Thursday, October 9, 2025)
Tenstorrent Productizes RISC-V CPU And AI IP
(Thursday, September 25, 2025)
22nm RISC-V AI Chip Targets Wearables and IoT
(Friday, September 19, 2025)
RISC-V: Shaping the Future of Mobility with Open Standards and Strong Partnership
(Thursday, September 18, 2025)
Infineon Reportedly Set to Build RISC-V Auto MCUs at TSMC Dresden Fab, Mass Production in 2028
(Monday, September 15, 2025)
RISC-V IP expands AI capabilities at the edge
(Monday, September 15, 2025)
SiFive details second generation RISC-V cores for AI accelerators
(Tuesday, September 9, 2025)
Linus Torvalds Rejects RISC-V Changes For Linux 6.17: "Garbage"
(Saturday, August 9, 2025)
NVIDIA on RVA23: "We Wouldn't Have Considered Porting CUDA to RISC-V Without It"
(Thursday, August 7, 2025)
7 Critical Components of the Car of Tomorrow
(Tuesday, August 5, 2025)
China Unyielding Ascent in RISC-V
(Tuesday, August 5, 2025)
MIPS and Cyient Collaborate on RISC-V Power Solutions
(Friday, July 25, 2025)
China Emerging as Significant Force in RISC-V Development and Adoption
(Friday, July 25, 2025)
NVIDIA's CUDA Now Supports RISC-V Processors in AI Systems, Marking a Major Development & Posing a Threat to the x86 and ARM Duopoly
(Saturday, July 19, 2025)
RISC-V Solidifies Presence in China as Global Momentum Builds
(Friday, July 11, 2025)
Andes Technology's AutoOpTune™ Applies Genetic Algorithms to Accelerate RISC-V Software Optimization
(Thursday, July 10, 2025)
160-core RISC V Board Is The M.2 CoProcessor You Didn't Know You Needed
(Monday, July 7, 2025)
Are open-source RISC-V CPUs a threat to ARM Holdings' business?
(Friday, July 4, 2025)
RISC-V and AI: Innatera's PULSAR Shakes Up the Edge
(Tuesday, June 24, 2025)
IAR Platform Accelerates Embedded Development with Updated Toolchains for Arm and RISC-V
(Tuesday, June 10, 2025)
Andes Technology Announces AndeSight™ IDE v5.4 to Streamline AI and Embedded Software Development on RISC-V
(Tuesday, June 10, 2025)
Metanoia Communications Selects Andes Technology RISC-V Processor to Boost 5G O-RAN Efficiency and Accelerate Development
(Monday, June 2, 2025)
SCI Semiconductor raises £2.5m to develop security-enhanced microcontroller based on CHERI
(Thursday, May 29, 2025)
CEA Backs RISC-V for Sovereign, Scalable Computing
(Wednesday, May 28, 2025)
SCI Semiconductor secures £2.5m towards developing CHERI-secured MCU
(Wednesday, May 28, 2025)
RISC-V Turns 15 With Fast Global Adoption
(Monday, May 26, 2025)
The RISC-V World Sees Changes, Milestones, and Innovations
(Wednesday, May 21, 2025)
RISC-V Technology Seeing Growing Maturity and Penetration
(Monday, May 19, 2025)
Parallel AI RISC-V compiler enters alpha testing
(Wednesday, May 14, 2025)
Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
(Tuesday, May 13, 2025)
RISC-V International Promotes Andrea Gallo to CEO
(Tuesday, May 13, 2025)
Keysom Unveils Keysom Core Explorer V1.0
(Monday, May 12, 2025)
KEYSOM is heading to RISC-V Summit Europe in Paris!
(Friday, May 9, 2025)
SiFive and Kinara Partner to Offer Bare Metal Access to RISC-V Vector Processors
(Friday, May 9, 2025)
Axiomise Featured Gold Sponsor at RISC-V Summit Europe Next Week in Paris
(Thursday, May 8, 2025)
Semidynamics Announces Cervell™ All-in-One RISC-V NPU Delivering Scalable AI Compute for Edge and Datacenter Applications
(Tuesday, May 6, 2025)
Andes Voyager RISC-V Micro-ATX Board Seeing Patches For Mainline Linux Support
(Sunday, May 4, 2025)
Codasip launches complete exploration platform to accelerate CHERI adoption
(Tuesday, April 29, 2025)
Baya Systems, Imagination Technologies and Andes Technology to Present on Heterogeneous Compute Architectures at Andes RISC-V CON Silicon Valley
(Monday, April 28, 2025)
FPGA prototyping harnessed for RISC-V processor cores
(Friday, April 25, 2025)
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