Fiber optic networks are a cornerstone of the digital future. As industries compete for key technologies, demand for higher bandwidths and lower latencies continues to grow. Future 6G networks, in particular, must meet extremely high data transmission requirements. The challenge: the higher the desired data rate, the more the signal quality tends to degrade. To compensate for interference, providers currently rely on digital signal processors. “However, these come with high costs and are not a sustainable long-term solution due to their enormous power consumption,” explains Michael Rothe, manager of the Embedded AI group at Fraunhofer IIS. As a result, further increases in fiber optic data rates are hitting technical limits.
The SpikeHERO project is working on a solution. The project partners are developing a novel AI processor architecture that combines an optical and an electrical spiking neural network chip. These neural networks will continuously monitor the communication channel, analyze signals, and correct any interference at the receiver using control parameters. By maintaining the signal quality, new possibilities open up for increasing data rates in fiber optic systems. Specifically, the project aims to triple the bandwidth from 10 GHz to 30 GHz and reduce latency from 10 microseconds to under 6 nanoseconds. At the same time, energy consumption is expected to drop from 7–10 watts to just 1–2 watts.
Inspired by the brain
Spiking neural networks (SNNs) are considered a promising advancement in artificial intelligence. Their mode of operation mimics the principles of the human brain: information is processed in the form of pulses — or “spikes” — and only when a critical relevance threshold is exceeded. This makes SNNs ideal for AI applications that require both real-time responsiveness and energy efficiency.
There are different approaches to developing SNN chip hardware. Optical semiconductors transmit spikes via photons, while electrical counterparts use voltage and current. Each type has its advantages, and SpikeHERO aims to combine both. For the electrical SNN chip, the project will use the SENNA chip developed by Fraunhofer IIS and Fraunhofer EMFT. “We’re currently working on the second generation, which promises even higher spike rates with lower energy consumption,” says Rothe.
A pan-European collaboration
SpikeHERO (Spike Hybrid Edge Computing for Robust Optoelectrical Signal Processing) is funded by the European Innovation Council (EIC) with a budget of over €4.2 million and will run from October 1, 2025, to September 30, 2029. The initiative brings together research and industry partners from four European countries: Fraunhofer IIS, Fraunhofer EMFT, Eindhoven University of Technology, Hewlett Packard Enterprise Labs Belgium, and Argotech a.s. from the Czech Republic.
Projects like SpikeHERO build on and strengthen the capabilities and infrastructure established through the Research Fab Microelectronics Germany (FMD). They also contribute to the APECS pilot line for Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems, implemented by FMD as part of the EU Chips Act. The goal: to drive chiplet innovation and advance European semiconductor research and manufacturing in the long term.