Nov. 17, 2025 –
The European Processor Initiative (EPI) is proud to announce the open-source release of VPSim, the Virtual Prototyping Simulator developed by CEA-List, used for early software-hardware co-validation and performance exploration of the European HPC processor. This will enable the establishment of a community of hardware and software designers dedicated to the European HPC ecosystem, which will accelerate design evaluation while preserving accuracy and software-hardware co-validation phases of next-generation HPC and edge systems.
Modern multi-processor systems-on-chip (MPSoCs) integrate thousands of cores, deep and heterogeneous memory hierarchies, and high-bandwidth interconnects that are tightly coupled to their physical environments. Designers must navigate the increasing complexity of MPSoC architectures and, to meet stringent requirements for energy efficiency, compactness, and performance, must account for software workloads early in the design process. To achieve these objectives, early design exploration is essential, supported by effective tools for modeling and simulating complex computing systems.
MPSoC simulation requires a careful balance between fidelity, execution speed, and modeling flexibility, especially in systems that integrate deep memory hierarchies and heterogeneous computing elements. VPSim addresses these challenges through a decoupled simulation methodology that separates CPU and memory hierarchy modeling, offering an optimal trade-off between accuracy and simulation speed.
Built around QEMU-based CPU models (Arm and RISC-V) and SystemC/TLM 2.0 modules, VPSim supports full software stacks—from BIOS and hypervisors to application workloads—enabling early software–hardware co-validation and performance evaluation. It also integrates with other simulators and modeling tools through FMI-based co-simulation, serving as a flexible digital twin for next-generation HPC and edge systems.
By releasing VPSim as open source, CEA-List aims to strengthen European collaboration in digital design and accelerate innovation in virtual prototyping, co-simulation, and design-space exploration. The open release will allow academic and industrial partners to extend the framework with new models and methodologies targeting emerging HPC architectures.
VPSim has been a key co-design tool in the development of Rhea, the European high-performance computing (HPC) processor led by SiPearl, in collaboration with CEA, Jülich Supercomputing Centre, and FORTH-ICS.
VPSim is available on GitHub:
https://github.com/CEA-LIST/vpsim-release
About EPI
The European Processor Initiative (EPI) is a project whose aim is to design and implement a roadmap for a new family of low-power European processors for extreme scale computing, high-performance Big-Data and a range of emerging applications.
The project has received funding from the European High Performance Computing Joint Undertaking (JU) under Framework Partnership Agreement No 800928 and Specific Grant Agreement No 101036168 (EPI SGA2). The JU receives support from the European Union’s Horizon 2020 research and innovation programme and from Croatia, France, Germany, Greece, Italy, Netherlands, Portugal, Spain, Sweden, and Switzerland.