Design & Reuse

GUC’s HBM4E IP Honored with Best IP / Processor and Five-Year Achievement in EE Awards Asia 2025

Jan. 08, 2026 – 

GUC is pleased to announce that it’s industry-leading 3nm HBM4E IP has been honored with the Five-Year Achievement Award – Engineers’ Choice Best EDA & IP / Processor at the EE Awards Asia 2025, recognizing the company’s sustained leadership, innovation excellence, and long-term contribution to the advanced semiconductor technologies. This honor reflects GUC’s continued commitment to Advanced Packaging Technologies (APT) and silicon intellectual property (IP), where the company continues to set industry benchmarks in both IP innovation and silicon-proven solutions. 

Over the past five years, GUC has received multiple awards from EE Awards Asia, highlighting the strength and breadth of its IP portfolio, including: 

  • 2021, GLink-2.5D IP : The Promising Product of the Year 
  • 2022, GLink-3D IP : Best IP of the Year 
  • 2023, HBM3E IP : Best IP of the Year 
  • 2024, UCIe 32G IP : Best IP of the Year 
  • 2025, HBM4E IP : Engineers’ Choice Best EDA & IP / Processor 5th anniversary Award 

Building on this strong foundation, GUC is accelerating the development of its next-generation APT platform and related IP. The company plans to complete several advanced IP programs that will further strengthen its leadership in advanced packaging and chiplet interconnect solutions: 

  • Announce the chip interconnect IP “UCIe 64G” in 3nm. 
  • Announce the chip interconnect IP “UCIe LP 32G/Face-Up” in 5nm. The IP is designed to use in the bottom die of a SoIC-X 3D stacking.  
  • Announce 2nm and 3nm HBM4E 16G (PHY and Controller) IP and also their face-up version, to support SoIC-X 3D stacking. 

GUC’s next-generation APT platform combines silicon-proven IP with its advanced ASIC design flow and mass-production experience, enabling customers to rapidly and confidently develop next-generation AI, high-performance computing (HPC), and networking solutions. This integrated platform significantly reduces development risk and accelerates time-to-market for designs at advanced process nodes. 

GUC extends its sincere appreciation to its engineers, partners, and the EE Awards Asia 2025 judging panel for their continued support and recognition. Looking ahead, GUC will continue to grow together with our customers and ecosystem partners to build a more competitive APT platform.