Design & Reuse

Chiplets Reach an Architectural Turning Point – Menta at Chiplet Summit 2026

Feb. 05, 2026 – 

Menta, a leading semiconductor IP company addressing architectural challenges in advanced and chiplet-based systems, will actively contribute at the upcoming Chiplet Summit 2026, where it will also outline the next phase of MOSAICS, its modular chiplet platform initiative, through a technical talk, participation in a panel session, and discussions at Booth #316.

Sophia-Antipolis, France  – At Chiplet Summit 2026 (February 17–19, Santa Clara), Menta will take the stage, marking its third consecutive year of participation and underscoring its growing role as a reference voice in the chiplet ecosystem.

Having initiated the MOSAICS modular chiplet platform at the Chiplet Summit in 2024, Menta returns in 2026 at a pivotal moment: chiplets are entering a phase where architecture, validation, and system-level coherence are becoming the primary challenges.

This year, Menta will contribute through:

  • A technical presentation, focused on the architectural decisions, trade-offs, and system foundations required to design scalable chiplet hubs for long-lived systems
  • A panel discussion:
    • “Selecting the Right Chiplets for Your Edge Application”, addressing how power efficiency, cost constraints, security, communications, and limited update cycles must be balanced as intelligence increasingly moves to the edge.

As chiplets move from architectural concept to industrial validation, the industry faces a critical gap: the lack of platforms capable of measuring, comparing, and de-risking modular designs under real operating conditions. At Chiplet Summit 2026, Menta will explain how this gap is being addressed — and why platforms such as MOSAICS are becoming essential to the next phase of chiplet adoption.

The 2026 Chiplet Summit also marks an important milestone for MOSAICS, the modular chiplet development and validation platform launched by Menta in 2024. After two years of architectural work, MOSAICS has reached a new phase:

  • a development kit and evaluation platform will be available by summer 2026, enabling early users to explore and validate modular chiplet configurations;
  • the first platform tapeout is planned for Q1 2027, marking a key step toward industrial deployment;
  • MOSAICS is designed to enable real-world measurement and validation of heterogeneous chiplet-based systems.

MOSAICS illustrates how Menta translates architectural vision into executable platforms — providing a concrete foundation to design, measure, and de-risk chiplet-based systems ahead of industrial deployment.

“As chiplets mature, the industry needs fewer promises and more structure,” said Vincent Markus, CEO of Menta. “Our continued presence at the Chiplet Summit reflects that shift — from introducing ideas to shaping architectures and validating them through platforms like MOSAICS.”

Menta will also welcome attendees and media at Booth #316 throughout the event.

Press & Analyst Invitation

Menta’s leadership and technical experts will be available for interviews during and after the Chiplet Summit to discuss:

  • the evolution of chiplet architectures toward industrial validation,
  • architectural strategies for edge, automotive and low-power systems,
  • and the role of platforms such as MOSAICS in structuring open and scalable chiplet ecosystems.

About Menta

Menta is a leading semiconductor IP and platform company with over 15 years of experience in programmable and adaptable silicon architectures. Originally recognized for its pioneering work in embedded FPGA (eFPGA) technology, Menta today addresses broader system-level challenges in advanced and chiplet-based designs, enabling semiconductor companies to build scalable, evolvable, and future-proof platforms.

About MOSAICS

MOSAICS is a modular chiplet development and validation platform initiated by Menta to address the limitations of monolithic SoC design. Built on a universal chassis and standardized interfaces, MOSAICS enables real-world validation of heterogeneous chiplet systems, accelerating development cycles by up to 4× and reducing non-recurring engineering costs by up to 10× for edge and automotive-class applications.

For more information, please visit the Menta site: http://www.menta-efpga.com/