Design & Reuse

RISC-V TDS350N IP Core: A55-Class Performance, AI Acceleration processor for AI and ML Scenarios

March 13, 2026 -

The 64-bit RISC-V IP core, TDS350N, is a production-proven, extracted-from-production-chip design that delivers performance competitive with A55, offers superior area efficiency, supports higher maximum operating frequency, improves code density, builds the DCLS functional security architecture, and supports Split/Lock mode. It achieves up to 5.2 CoreMark/MHz and 2.5 DMIPS/MHz, built on an 8-stage pipeline superscalar in-order CPU, supporting the IMACBFD(V) instruction set with Zfh extension, designed for scalable compute applications.

Supporting Machine and User modes, advanced security with Smepmp and configurable PMP regions (up to 64), and RVV 1.0 vector extension with up to 1024-bit vector width for high-throughput data processing. It includes configurable ITIM/DTIM (0–128 KB), L1 instruction and data caches (8K/16K/32K) with optional ECC, and supports JTAG/cJTAG debugging, CLINT and APLIC interrupt architecture, and a CIE coprocessor extension interface for NPU integration.

Suitable for applications requiring high compute performance and efficient data processing, such as smart security systems, embodied intelligence, autonomous driving, and smart industrial control. The processor is well-suited for advanced embedded and AI-enabled systems that demand scalable performance, fast data handling, and reliable operation across modern edge computing markets.

The TDS350N complements T2M’s full range of RISC-V IP cores portfolio covering more than 20 cores, which spans ultra-low-power MCU-class designs to high-performance embedded processors comparable to M0 -  A55. With both 32-bit and 64-bit CPUs, optional accelerators, and safety-ready cores (ASIL-B/D), the portfolio empowers customers to develop differentiated silicon across automotive, industrial, consumer, medical, and edge-AI markets.

 Meet T2M at Semicon China, Shanghai, (25th to 27th March)

Schedule an appointment with our team to explore how our RISC-V IP cores can enhance your embedded systems.

Please send meeting requests to contact@t-2-m.com.

About Us:  T2M provides a broad portfolio of semiconductor IPs, including interface IPs (USB, PCIe, DDR, MIPI, HDMI), programmable SerDes, and Wireless IPs,: Cellular IPs (5G, NB-IoT), Satcom IPs (GNSS, SDR, NTN), BT/BLE (Controller and RF) IPs and Wi-Fi RF IPs available in major Fabs in process geometries along with ASIC services.