SoC-e Announces New Release of Managed Ethernet Switch (MES) IP Core Supporting DLR for Ethernet/IP
January 24, 2018 -- Device Level Ring (DLR) is a Layer-2 protocol that provides media redundancy in a ring topology. The DLR protocol is intended primarily for implementation in Ethernet/IP end-devices that have two Ethernet ports and embedded switch technology. The DLR protocol provides fast network fault detection and reconfiguration in order to support the most demanding control applications.
A DLR network includes at least one node configured to be a Ring Supervisor, and any number of Beacon Based Nodes. It is assumed that all the ring nodes have at least two Ethernet ports and incorporate embedded switch technology.
The new realease of SoC-e’s MES IP Core (Managed Ethernet Switch) fully supports DLR protocol. The IP Core allows to implement a DLR end-device, with embedded switching capabilities and supports multiple Ethernet interfaces. The following network node configurations can be implemented with the MES IP Core:
- Ring Supervisor Node
- Beacon Based Node
|
Related News
- SoC-e's Managed Ethernet Switch now supports up-to 32 ports
- Stage Tec introduces HSR for Professional Audio Broadcasting using SoC-e Technology
- SoC-e's MTSN Switch IP Core solution now supports 802.1AB (LLDP)
- SoC-e networking IP porfolio extends with SpaceWire: The standard for Spacecraft communication networks
- GE Power Management licenses SoC-e wire-speed Cryptography IP for GOOSE&Sampled Values Security
Breaking News
- Industry Veteran Randy Allen Joins SiFive as Vice President of RISC-V Software
- AccelerComm Reduces 5G Latency by up to 16x with NR LDPC Channel Coding
- Dialog Semiconductor and Flex Logix Establish Strategic Partnership for Mixed Signal Embedded Field-Programmable Gate Arrays (eFPGA)
- Lattice Announces New Low Power FPGA Platform
- SiFive Announces New Technologies for Mission-Critical and AI Markets
Most Popular
- Xilinx Issues Statement in Response to Analog Devices Patent Infringement Lawsuit
- Andes Corvette-F1 N25 Platform Becomes one of the first RISC-V Platforms Qualified for Amazon FreeRTOS
- UltraSoC donates RISC-V trace implementation to enable true open-source development
- Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2019
- Tech Industry Heavyweight Joins SiFive - Manoj Gujral Tapped As SVP & GM of Silicon Business Unit
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |