TSMC announces initial availability of Design-in-the-Cloud via OIP VDE and OIP Ecosystem Partners
Hsinchu, Taiwan, R.O.C. – Oct 3, 2018 –TSMC (TWSE: 2330, NYSE: TSM) today announced the initial availability of its Open Innovation Platform® Virtual Design Environment (OIP VDE), which enables semiconductor customers to securely design in the cloud, leveraging TSMC OIP design infrastructures within the flexibility of cloud infrastructures. OIP VDE is the result of TSMC collaboration with TSMC OIP design ecosystem partners and leading cloud providers to deliver a complete systems-on-chip (SoCs) design environment in the cloud.
About OIP VDE
TSMC OIP VDE’s first implementations of digital RTL-to-GDSII and custom schematic capture-to-GDSII flows are via partnerships with TSMC’s inaugural Cloud Alliance partners, Amazon Web Services (AWS), Cadence, Microsoft Azure, and Synopsys.
In TSMC’s enablement of OIP VDE, both digital and custom design flows have been validated in the cloud, along with OIP design collateral—including process technology files, PDKs, foundation IP, and reference flows. To ensure low barriers to entry and high technical support levels, Cadence and Synopsys act as the focal point helping customers to set up VDE and providing first line support.
Microsoft and Cadence collaborated with SiFive, a TSMC IP Alliance partner, to tape out the first full SoC design in TSMC’s OIP VDE. It contained its 64-bit multi-core RISC-V CPU, the Freedom Unleashed 540, which is capable of running a RISC-V Linux distribution and its applications via TSMC OIP VDE. The SiFive implementation was done in the U.S. and India.
Synopsys, a key TSMC IP Alliance, and VDE partner, has successfully taped out its high-speed DesignWare® PHY IP for PCI Express® 5.0 on TSMC’s advanced 7-nm process through the Synopsys® Cloud Solution enabled for TSMC OIP VDE using TSMC process models and rule decks. This tapeout, achieved in collaboration with Amazon Web Services, was accelerated by taking advantage of cloud scalability to 1000+ CPU cores.
Arm, a key TSMC IP Alliance partner, has collaborated with its EDA partners and TSMC, to ensure Arm’s ecosystem of silicon partners are able to immediately design-in-cloud including Arm’s latest processors and across all TSMC nodes through its most advanced 7nm node.
“The cloud is pervasive and will fundamentally influence silicon design. TSMC is the first foundry to collaborate with design ecosystem partners and cloud providers to enable designs in the cloud,” said Cliff Hou, vice president of Technology Development at TSMC. “TSMC OIP VDE provides flexible, secure, and silicon-validated cloud-based design solutions to semiconductor customers, enabling them to optimize and scale their computing infrastructure, and ultimately accelerating time-to-market for next generation SoC designs.”
TSMC OIP VDE is available with the VDE Storefronts being handled directly by Cadence and Synopsys, respectively.
The Cadence Cloud-Hosted Design Solution is immediately available as a VDE Storefront with successful tapeouts completed. Cadence’s VDE collaboration with TSMC enables customers of any size using any process node to securely optimize design throughput using the scalability and flexibility of the cloud. Additional detail regarding Cadence’s deployment of VDE is available at www.cadence.com/go/cadencecloud2.
The Synopsys Cloud Solution, enabled for TSMC VDE, is available immediately in both Amazon Web Services and Microsoft Azure cloud environments. For more information on the Synopsys Cloud Solution, visit www.synopsys.com/cloud .
“Cadence unveiled the industry’s first broad cloud portfolio for semiconductor development earlier this year, and we’re continuing to expand it with the immediate availability of TSMC’s VDE in the Cadence Cloud-Hosted Design Solution,” said Dr. Anirudh Devgan, president of Cadence. “The Cadence Cloud-Hosted Design Solution is a production-proven, EDA-optimized cloud environment with active customer engagements, leveraging extensive experience hosting design environments for more than 100 customers. Through our collaboration with TSMC, Arm, Microsoft and AWS, Cadence is leading the industry to shift to the cloud, providing the productivity, security, scalability and flexibility customers require to use TSMC design collateral effectively across companies and geographic regions.”
“Synopsys tools and IP are at the heart of innovations fueling the growth of high-end cloud infrastructure,” said Deirdre Hanford, co-general manager, Synopsys Design Group. “Today we are expanding our Open Innovation Platform® Alliance partnerships in EDA and IP to become an OIP Cloud Alliance partner. Building on 15 years of cloud services for the most advanced designs, Synopsys has collaborated with TSMC, Amazon Web Services, Microsoft Azure, and Arm to streamline the Synopsys Cloud Solution for TSMC VDE. This proven environment is ready for our mutual customers to benefit from the scaling and flexibility of the cloud.”
“We’re seeing semiconductor customers increasingly adopt the tested and proven Microsoft Azure cloud platform for their silicon design,” said Kushagra Vaid, GM and Distinguished Engineer, Azure Hardware Infrastructure, Microsoft Corp. “Azure provides a globally available, high performance computing (HPC) platform, that is secure, reliable and scalable to meet the emerging and evolving needs of the industry.”
“Through joint efforts with TSMC, along with our EDA and cloud partners, Arm has ensured its 500+ silicon partners can immediately benefit from the accelerated design cycles the cloud will enable,” said Rene Haas, president, Arm Intellectual Property Group. “In addition to accelerating Arm’s own IP design, designing SoC’s in the cloud gives our partners crucial flexibility to scale to the cloud to achieve critical design steps more rapidly without acquiring their own servers in house. We are committed to ensuring our partners can fully take advantage of these new design approaches across the range of designs including our latest high-performance cores.”
“The completeness of TSMC’s capabilities for the design, fabrication and delivery of SoCs provide the foundation for SiFive establishing a new paradigm for chip and core development,” said Naveed Sherwani, Chief Executive Officer of SiFive. “TSMC makes it possible to quickly and feasibly obtain semiconductors tailored to specific needs. We are honored to partner with TSMC, Microsoft and Cadence, as they are enabling our work to bring a new era of unprecedented possibilities for customized silicon."
TSMC is the world’s largest dedicated semiconductor foundry, providing the industry’s leading process technology and the foundry segment’s largest portfolio of process-proven libraries, IPs, design tools and reference flows. The Company’s owned capacity in 2018 is expected to reach above 12 million (12-inch equivalent) wafers, including capacity from three advanced 12-inch GIGAFAB® facilities, four eight-inch fabs, one six-inch fab, as well as TSMC’s wholly owned subsidiaries, WaferTech, TSMC China, and TSMC Nanjing. TSMC is the first foundry to provide 7-nanometer production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please visit http://www.tsmc.com