Search IP on TSMC

DesignWare HBM2E PHY IP for TSMC N5

1.2V analog IO library for TSMC 65nm

• Optimized for radiation hard (SEU and TID)
• Low capacitance for high speed/high frequency
• Overvoltage tolerant

TSMC 180nm 5V Bandgap

Micro Power Bandgap for TSMC 180nm

1Kx32 Bits OTP (One-Time Programmable) IP, TSMC 40ULP 1.1/2.5V

256x8 Bits OTP (One-Time Programmable) IP, TSMC 0.13um 1.5V/3.3V LP Process

DesignWare DDR5/4 PHY IP for TSMC N6

• Low latency, small area, low power
• Compatible with JEDEC standard DDR5 SDRAMs up to 4800 Mbps
• Compatible with JEDEC standard DDR4 SDRAMs up to 3200 Mbps

256x1 Bits OTP (One-Time Programmable) IP, TSMC 0.18μm 1.8V/3.3V Mixed-Signal, General Purpose II

• Fully compatible with TSMC 0.18μm Mixed-Signal, General Purpose II (180MSGPII) process

eTCAM (Embedded Ternary Content Addressable Memory IP

• One cycle operation latency (without priority encoder)
• Valid Bit per entry to reduce power
• Valid Bit reset in one cycle support

eTCAM (Embedded Ternary Content Addressable Memory IP

112G USR/XSR PHY on TSMC N7

• Offers leading performance, power, and area / beachfront per terabit
• Includes 16 lanes of NRZ and PAM-4 transmitters or receivers

HBM3 PHY

• 16 channels @ 64 bits/channel
• Up to 8.4 Gbps/pin
• Supports 2, 4, 8, 12 and 16 DRAM stack height