English
PCIe 2.0 PHY, TSMC 16FFC, FFPGL, FFPL x1, x2, x4, x8 North/South (vertical) poly orientation
TSMC Goes Photon to Cloud
Rick Merritt, EETimes
October 4, 2018
SAN JOSE, Calif. — TSMC taped out its first chip in a process making limited use of extreme ultraviolet lithography and will start risk production in April on a 5nm node with full EUV. Separately, the foundry forged partnerships with four partners to support online services for back-end chip design.
The foundry’s update showed area and power gains continue in its leading-edge nodes, but chip speeds are no longer advancing at their historic rate. To compensate, TSMC gave an update on a half-dozen packaging techniques it is developing to speed connections between chips.
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