Will Feature First Commercially Available OpenCAPI Verification IP
SAN JOSE, CALIF –– August 13, 2019 –– SmartDV™ Technologies, the Proven and Trusted choice for Verification Intellectual Property (VIP) supporting simulation emulation, field programmable gate array (FPGA), formal models and post-silicon validation platforms, Design IP and rapid customized VIP and Design IP development will feature the first commercially available OpenCAPI Verification IP compatible with the OpenCAPI 3.0 and 3.1 standard at the OpenPower Summit.
WHEN: Monday and Tuesday, August 19 and 20. Attendees can schedule demonstrations through: email@example.com
WHERE: Manchester Grand Hyatt, San Diego, Calif.
SmartDV’s OpenCAPI Verification IP verifies OpenCAPI interfaces and includes an extensive test suite that performs random or directed protocol tests to create a range of scenarios to effectively verify the design under test. It supports all major verification languages and methodologies, including open verification methodology (OVM), universal verification methodology (UVM) and SystemC.
SmartDV™ Technologies is the Proven and Trusted choice for Verification and Design IP with the best customer service from more than 250 experienced ASIC and SoC design and verification engineers. Its high-quality standard or custom protocol Verification and Design IP are compatible with all verification languages, platforms and methodologies supporting all simulation, emulation and formal verification tools used in a coverage-driven chip design verification flow. The result is Proven and Trusted Verification and Design IP used in hundreds of networking, storage, automotive, bus, MIPI and display chip projects throughout the global electronics industry. SmartDV is headquartered in Bangalore, India, with U.S. headquarters in San Jose, Calif. Visit SmartDV to learn more.