1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
Mirabilis Design is making the standard training class on Model-based System Simulation and Electronic System-Level Design for free
Santa Clara, CA. — April 7, 2020 — Mirabilis Design announced today that they will be conducting free training class on Model-based System Simulation and Electronic System-Level Design for all Engineers and students. COVID-19 has reduced the opportunity to attend training classes and conferences and we are lifting the spirits by empowering engineers with knowledge. The company will also be providing a month license of VisualSim Architect, application-specific tutorials and special training videos at no charge.
The first of these series is on System Architecture Design and Exploration of Electronics, Software and Network. To register, you can visit- https://www.mirabilisdesign.com/sign-up/
Training Date:
April 22 and 24
Time: Same time on both days
11:00 AM CET/ 2:30 PM India
09:30 AM PT/12:30 PM ET USA
Note: Each training class is made up of two sessions with follow-up assignments.
Mirabilis Design is offering the popular Systems Architecture Exploration Class to all hardware, semiconductor and software engineers. You will be trained in system modeling methodologies, experimental methods and reporting. Homework projects will be provided in your area of interest and will be reviewed by the Trainer. The applications covered during the training include stochastic modeling of electronics, task graph modeling of software, cache coherence, network topology, bus and memory design, and processor selection. Techniques covered are basic building blocks required, translation of a block diagram into a model, minimum attribute set to conduct trade-offs, modeling abstraction, statistics selection and interpret results to make decisions. The analysis will cover timing, throughput, energy and behavioral correctness.
University students: If you enroll and pass the exam that follow the session, you will receive a Digital Certificate on Proficiency in System-Level Design.
About Mirabilis Design
Mirabilis Design, a Silicon Valley company, designs cutting edge software solutions that identify and eliminate risks in product performance. Its flagship product, VisualSim Architect is a system-level modeling, simulation, and analysis environment that relies on libraries and application templates to vastly improve model construction and time required for analysis. The seamless design framework facilitates designers to work on a design together, cohesively, to meet an intermeshed time and power requirements. It is typically used for maximum results, early in the design stage, parallel to the development of the product’s written specification. It precedes implementation stages - RTL, software code, or schematic – rendering greater design flexibility.
|
Related News
- Accellera Systems Initiative Announces IEEE 1666 SystemC Language Standard for Electronic System-Level Design Is Available for Download at No Charge
- IEEE Approves Revised IEEE 1666 "SystemC Language" Standard for Electronic System-Level Design, Adding Support for Transaction-Level Modeling
- Agilent Technologies' New Electronic System-Level EDA Platform Helps Algorithm Developers, System Architects Cut Design Time in Half
- IEEE Ratifies SystemC 2.1 Standard for System-Level Chip Design; IEEE(R) 1666 Allows Faster System-on-Chip Design, Intellectual Property Exchange
- Companies Band Together in Support of Electronic System-Level (ESL) Design and Verification at Upcoming Design Automation Conference
Breaking News
- Rambus Delivers 6400 MT/s DDR5 Registering Clock Driver to Advance Server Memory Performance
- GreenWaves Technologies announces a €20M financing
- Xfuse, LLC Phoenix ISP Now Available as a Download for AMD Kria KV260 Vision AI Starter Kit
- UMC and Cadence Collaborate on 3D-IC Hybrid Bonding Reference Flow
- Siemens advances integrated circuit verification with new, data-driven Questa Verification IQ software
Most Popular
- Intel kills its RISC-V Pathfinder development kit programme
- Faraday Announces Multi-site Manufacturing Support in ASIC
- Weebit Nano nears productisation, negotiating initial customer agreements
- EU Parliament Adopts Position on Chips Act
- Siemens advances integrated circuit verification with new, data-driven Questa Verification IQ software
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |