Metrics Announces an EDA as a Service Partnership Program with Semiconductor Intellectual Property Vendors
The partnership will provide a comprehensive design verification ecosystem for accelerating regression testing using the Metrics Cloud Platform
Ottawa -- March 1, 2021 – Metrics Design Automation, the first vendor to provide EDA as a Service in the cloud, today announced the launching of a new partnership program with semiconductor intellectual property (IP) vendors. IP is a critical component of today’s ASIC designs and the goal of the Metrics partnership program is to ensure their customers will have support of all of the IP required for ASIC regression testing.
“This partnership led by Metrics is for the benefit of our mutual customers – we’re proactively establishing business relationships with IP vendors to ensure our customers have the validated IP simulation models that they require for their regression testing,” said Doug Letcher, founder and CEO of Metrics. “Now that the ASIC design industry is realizing the proven performance, cost-effectiveness, and security benefits of EDA as a SaaS cloud computing model, Metrics is investing time and resources to ensure the same comprehensive verification ecosystem used in on-premises datacenters for many years is now available in the public cloud.”.
In addition to the prior working relations with IP vendors such as Avery Design Systems, SmartDV, Imperas, Omni Design, and Google Cloud, Metrics has welcomed three new IP vendors to the program – Codasip, PLDA, and Silicon Arts. Metrics anticipates expanding their partnership program to include the majority of the almost 100 IP vendors providing IP to the ASIC design community today.
“SiliconArts can bring our RTL closer to developers and customers via Metrics scalable compute model through cloud access, enabling quick IP evaluation, regression and integration in SOC designs early in the design process, key for large complex designs” says Dr. Hyungmin Yoon, CEO and founder of SiliconArts. “We are excited for the Metrics design flow to enable our world leading IP in customer’s SOC projects.”
“Codasip sees the cloud as a game-changer for EDA, especially for tasks like regression simulations that work in batch mode” said Karel Masařík, CEO Codasip. “We welcome the opportunity to join the Metrics’ IP Vendor Partnership”.
About Metrics
Headquartered in Ottawa, Canada, Metrics was founded in 2017 and is led by an experienced group of EDA and business executives. The company’s first product is a fully compliant SystemVerilog simulator implemented in the Google Cloud Platform. The company plans to be the first EDA company to offer a complete RTL-to-GDSII cloud-based design flow and tools on all the major cloud platforms. Find out more at www.metrics.ca
About Codasip
Codasip delivers leading-edge RISC-V processor IP and high-level processor design tools, providing IC designers with all the advantages of the RISC-V open ISA, along with the unique ability to customize the processor IP. As a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded processors. Formed in 2014 and headquartered in Munich, Germany, Codasip currently has offices in Europe and China, with sales representatives worldwide. For more information about our products and services, visit www.codasip.com. To learn more about RISC-V, visit www.riscv.org.
About SiliconArts
SiliconArts provides world class ray tracing graphics processor IP optimized for performance and power dissipation utilizing patented MIMD technology for real-time applications in visualization, gaming and other advanced graphics use cases requiring photo realistic rendering. Formed in 2010 and headquartered in Seoul, Korea, SiliconArts also has offices in Silicon Valley and provides for both cloud and client based rendering solutions. For more information about our products and capabilities, visit www.siliconarts.com.
|
Related News
- QualCore Logic Named Member of IBM IP Collaboration Program Provides Crucial Semiconductor Intellectual Property to Mutual Customers
- QuickLogic Taps Semiconductor Intellectual Property Veteran for Advisory Board
- RivieraWaves Licenses its Bluetooth Smart 4.1 Intellectual Property to Dialog Semiconductor
- Microsemi Licenses Secure Semiconductor Design Intellectual Property from Cryptography Research
- Accellera Announces Standard for Tracking Soft Intellectual Property Usage through the Semiconductor Design and Development Process
Breaking News
- Quobly announces key milestone for fault-tolerant quantum computing
- CEA-Leti Demonstrates Embedded FeRAM Platform Compatible with 22nm FD-SOI Node
- Cadence and Rapidus Collaborate on Leading-Edge 2nm Semiconductor Solutions for AI and HPC Applications
- MosChip selects Cadence tools for the design of HPC Processor “AUM” for C-DAC
- Rambus and Micron Technology Extend Patent License Agreement
Most Popular
- SiFive Empowers AI at Scale with RISC-V Innovation
- MIPS Releases P8700, Industry's First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles
- Alphawave IP - Announcement regarding leadership transition
- Now Gelsinger is gone, what is Intel's Plan B?
- Sondrel now shipping chips as part of a complete turnkey project
E-mail This Article | Printer-Friendly Page |