Scalable, On-Die Voltage Regulation for High Current Applications
StarFive Adopts Valtrix STING for Verification of Next-generation RISC-V Processors
BANGALORE, India -- June 23, 2021 -- Valtrix Systems, provider of design verification products for building functionally correct CPU and system-on-chip implementations, announced today that StarFive, a leading provider of RISC-V processors, platforms and solutions in China, has licensed STING for verification of the next generation of RISC-V processors.
STING, a design verification product from Valtrix, uses software-driven methodology to check the functional correctness and architectural compliance of RISC-V implementations. The product also consists of a RISC-V architecture verification suite and stimulus programming framework to provide the engineering teams an easy ramp into verification readiness and a platform to extend the base stimulus by writing custom tests.
Ad |
32-bit Embedded RISC-V Functional Safety Processor 64-bit RISC-V Application Processor Core 64-bit embedded processor, fully compliant with the RISC-V ISA |
StarFive's CTO, Morton Yu, said: "We are delighted to work with Valtrix Systems. Its design verification tool STING features a highly flexible stimulus development framework and a large library of test stimulus. These add a new level of testing before the release of our next-generation processor design. StarFive has always looked to contribute to a more complete RISC-V processor ecosystem and we look forward to deepening our collaboration with Valtrix in delivering more powerful RISC-V technology."
"The open-source and modular RISC-V architecture allows CPU developers to innovate and customize their offerings to meet the application needs. Verification of custom implementations can be challenging and it needs a versatile solution which can adapt according to the requirements of the design configuration," said Shubhodeep Roy Choudhury, CEO of Valtrix. "STING's well-proven verification methodology has been deployed and used successfully by multiple RISC-V developers and we are proud to partner with StarFive and help them in their endeavor of developing advanced RISC-V implementations," he added.
For more information on Valtrix's design verification technology and products, visit: https://www.valtrix.in
About Valtrix's STING Design Verification Tool
STING, the flagship product of Valtrix, is a commerically supported design verification tool for RISC-V based implementations. It can be configured to generate portable bare-metal programs containing self-checking architecturally-correct test stimulus, which can then be enabled on simulation, FPGA prototypes, emulation or silicon.
About StarFive
Founded in 2018, StarFive is a leading provider of RISC-V processors, platforms and solutions in China. Its portfolio of CPU IP is optimized for maximized performance and power efficiency, which are widely used in home appliances, industrial robots, network communication devices, edge computing. The company recently announced BeagleV™ single-board computer which is the first affordable RISC-V board to run on Linux.
|
Related News
- Codasip announces next-generation RISC-V processor family for Custom Compute
- Axiomise Launches Next-Generation formalISA App for RISC-V Processors
- UltraRISC Selects Valtrix STING for Verification of RISC-V SoC Designs
- C-DAC Selects Valtrix STING For Design Verification Of RISC-V Based Microprocessors
- Axiomise Announces the Release of the Next-Generation RISC-V App
Breaking News
- Comprehensive ADC/DAC and AFE IP Solutions: Empowering Next-Gen Applications Across Diverse Technology Nodes
- Intel Announces Retirement of CEO Pat Gelsinger
- Tenstorrent closes $693M+ of Series D funding led by Samsung Securities and AFW Partners
- VeriSilicon partners with LVGL to enable advanced GPU acceleration for wearable devices and beyond
- HighTec C/C++ Compiler Suite Supports Andes' ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications
Most Popular
- Intel Announces Retirement of CEO Pat Gelsinger
- Tenstorrent closes $693M+ of Series D funding led by Samsung Securities and AFW Partners
- HighTec C/C++ Compiler Suite Supports Andes' ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications
- VeriSilicon partners with LVGL to enable advanced GPU acceleration for wearable devices and beyond
- Alphawave Semi Drives Innovation in Hyperscale AI Accelerators with Advanced I/O Chiplet for Rebellions Inc
E-mail This Article | Printer-Friendly Page |