Targeting embedded recorder systems: LDS-NVME-HOST-K7U & LDS-NVME-HOST-ZUP
France, Gournay sur Marne, January 28th 2022 – The LDS-NVME-HOST-K7U & LDS-NVME-HOST-ZUP IP completes an existing family of Xilinx NVME HOST IP of Logic Design Solutions (LDS) in order to provide a complete panoply in embedded recording domain.
The LDS-NVME-HOST-K7U & LDS-NVME-HOST-ZUP IP are one of the most flexible IP in the market at an excellent price.
Thus all the NVMe protocol is managed by the IP, which is connected to an embedded PCIe Root Port IP in the FPGA.
Configuration of the PCIe and of the NVMe are done automatically on demand.
The configuration of the recording session is done by writing to IP registers.
All buses are in AXI to facilitate the integration of the IP.
The IP is manageable either by a state machine, whose VHDL source code is provided or by a CPU whose C source code is also provided.
The user can start his project directly from the projects delivered by LDS.
Evaluation on ZCU106 Xilinx board + FMC Opsero FPGADrive board is available.
About Logic Design Solutions
Logic Design Solutions develops IP for FPGA, and provides FPGA design services.
We have an expertise in fast designs and for over 25 years' experience in FPGA/PLD Design.
Logic Design Solutions' IP are an excellent value.
Our competitive pricing enables customers to decide easily either purchasing or developing.
More information on our company, customers and IPs can be found on www.logic-design-solutions.com