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Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
A Big Week for RISC-V
By Sally Ward-Foxton, EETimes (February 10, 2022)
It’s been a banner week for the RISC-V ecosystem. The profile of the open-source instruction set architecture (ISA) has been raised by a pair of announcements. Let’s take a closer look.
Intel support
Earlier this week, Intel announced it would join RISC-V International as a premier member. Intel Foundry Services (IFS) will embrace designs built on multiple ISAs in order to compete with foundry giants Taiwan Semiconductor Manufacturing Co. and Samsung. Intel claims to be the only foundry offering IP optimized for x86, Arm and RISC-V.
The wording is crucial here, acknowledging as it does that RISC-V is joining x86 and Arm as a leading chip architecture.
Intel’s embrace of RISC-V means developing an ecosystem of its own. To that end, Intel is partnering with key RISC-V players, including CPU designer SiFive, AI accelerator chip company Esperanto, embedded CPU designer Andes Technology and data center CPU designer Ventana Microsystems. The partners will work with Intel to optimize their designs for Intel’s process technologies.
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