English
The Art of Predictability : How Axiomise is Making Formal Verification Mainstream
By Amelia Dalton, EEJournal (March 25, 2022)
In this week’s Fish Fry podcast, Ashish Darbari (Founder and CEO at Axiomise) joins me to chat about the past, present and future of formal verification. Ashish and I explore the three pillars of formal verification, how the perception of formal verification as changed over the years, and why we are seeing the increased adoption of formal verification today. Also this week, I delve into the details of a new immune-system-on-a-chip developed by the Wyss Institute at Harvard University.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- Axiomise Accelerates Formal Verification Adoption Across the Industry
- Meet Axiomise's Ashish Darbari at DAC to Learn about Benefits of Formal Verification
- Axiomise Unveils Intelligent Debug Solution for Formal Verification of RISC-V Cores
- Axiomise Announces the Release of the Next-Generation RISC-V App
- DVCon India 2023 | Keynote: "Journeying Beyond AI: Unleashing the Art of Verification" by Sivakumar P R, Founder & CEO, Maven Silicon
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process