Higher-quality verification to drive adoption and build momentum for RISC-V IP
Munich, 3 May 2022 – Codasip, the leader in processor design automation, has expanded its adoption of formal verification solutions for comprehensive and thorough processor testing with the addition of OneSpin IC verification tools from Siemens EDA. Codasip has continually invested heavily in processor verification to underpin the company’s ability to deliver the industry’s highest quality RISC-V processor IP.
Siemens EDA’s OneSpin tools provide an advanced and incredibly robust verification platform to tackle critical IC integrity issues. The highly advanced OneSpin formal verification tools for automotive and other high-integrity processor applications verify the implementation with minimal set up and runtime.
The quality of Codasip RISC-V processor IP sets it apart from competitors. With 2 billion cores of Codasip processor IP already in use, mostly with tier one customers, it is essential that Codasip continues to offer processor IP that is consistently of the highest quality.
Neil Hand, strategy director for the IC Design Verification division of Siemens EDA, “We are pleased to collaborate with Codasip to help ensure the high quality of their RISC-V Processor IP, as well as to establish optimized solutions for our mutual customers. The world-class technology of our OneSpin formal verification tools including the OneSpin RISC-V verification solution, together with Codasip’s innovative RISC-V IP, is key for IC designers to deliver high-quality products to market quickly.”
Rupert Baines, CMO, Codasip, commented, “The poor verification of some RISC-V IP is frankly shocking. Developers have legitimate concerns about the quality of RISC-V IP that’s holding back its adoption. Higher quality and formally proven RISC-V IP will help it to cross the chasm and massively increase its adoption.”
Codasip’s Director of Verification, Philippe Luc, added, “We are very proud of our own rigorous approach to verification with a strong in-house verification team – our own extremely thorough internal testing methodologies, combine with best-in-class third-party tools. As part of this, we’re delighted to use OneSpin technology from Siemens EDA, which is a key partner for Codasip - we look forward to a closer and productive relationship.”
Codasip uses Siemens EDA (formerly Mentor Graphics) as its primary EDA tool flow.
Codasip is presenting on its experiences with the OneSpin tool at Siemens EDA User2User2022 conference at Santa Clara on May 4th and in Munich on May 12th.
Codasip delivers leading-edge RISC-V processor IP and high-level processor design tools, providing IC designers with all the advantages of the RISC-V open ISA, along with the unique ability to customize the processor IP. As a founding member of RISC-V International and a long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded and application processors. Formed in 2014 and headquartered in Munich, Germany, Codasip currently has R&D centers in Europe and sales representatives worldwide. For more information about our products and services, visit www.codasip.com. For more information about RISC-V, visit www.riscv.org.