LeWiz released RISC-V with OmniXtend clustering technology to open source.
December 13, 2022 -- OmniXtend is an open source architecture for clustering of processors (or servers) to remote storage and memory systems on the network. It allows processors such as RISC-V CPU(s) to execute programs stored remotely on network based storage or memory systems. This allows the processor to treat remotely stored information as if the information (program or data) is stored in its local memory. This extends the storage resource of the processor to what's available on the network -- any type of network whether wired or wireless, essentially limitless. Yet, it still can maintain data coherency across the memory hierarchy, keeping the information consistent across the network so if a piece of information is updated (locally or remotely), the processing system does not use stale data, maintaining correctness.
Did you know that such systems can also be fault tolerant? If a processing node is no longer available, other node(s) in the cluster can be made to pick up and continue the processing as if the failure has not occurred. LeWiz develops technology for space and other high reliability applications where fault tolerant is an important capability. It previously developed radiation tolerant RISC-V CPU, memory control and I/O subsystems enabling a system in space to continue to operate even if encountering failure due to radiation.
Ad |
RISC-V processor - 32 bit, 5-stage pipeline ![]() High performance dual-issue, out-of-order, 7-stage Vector processor (DSP) IP ![]() RISC-V Application Processor ![]() |
Released here: https://github.com/lewiz-support/OmniXtend_RemoteAgent_RISC-V
We've also released IP cores to open source on Github. This open source release furthers LeWiz contribution to the open source community advancing state of the art technologies.
|
LeWiz Communications, Inc. Hot IP
Related News
- Renode 1.4 released: 64-bit RISC-V HiFive Unleashed support, multiple Silicon Labs targets, and more
- LeWiz Open Source LVDS Transceiver Design
- New RISC-V processors address demand for open source and performance
- Milk-V Launches Milk-V Vega, the World's First RISC-V Open Source 10 Gigabit Ethernet Switch
- Industry Leaders Launch RISE to Accelerate the Development of Open Source Software for RISC-V
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |