Apr. 25, 2024 –
SUNNYVALE, CA, UNITED STATES, April 24, 2024 -- Numem, the pioneering provider of Memory SOC IPs and Chip/Chiplets, is excited to announce that Numem CEO Jack Guedj will discuss cutting-edge memory solutions at the Design & Reuse IP SoC Silicon Valley 2024 event, which will take place on April 25th, 2024, at the Hyatt Regency Santa Clara, CA. We invite you to join us for this insightful session.
Through this event, we will present our state-of-the-art low-power NuRAM Memory (MRAM-Based) and our SmartMem SOC Subsystem, IP Cores and Memory SOC Chiplets. Numem NuRAM's memory is 2-3X smaller in area and 85x - 2000x lower leakage power than SRAM. It is augmented by our SmartMem SOC Subsystem, which includes:
About Numem
Numem, headquartered in Sunnyvale, California, is the leading provider of Memory and SOC Subsystem IPs and Chip/Chiplets based on proven foundry MRAM process. Numem’s patented NuRAM technology enables best in class power/performance and reliability with 2.5x smaller area and >85x lower leakage power than traditional SRAM. Numem’s SmartMem technology significantly improves performance and endurance as well as ease-of-use and reliability for high-volume deployment. Numem Chip/Chiplets enable significant power reduction in AI systems from Edge Node to Server applications. Numem SmartMem can be used in conjunction with other memory technologies including MRAM, RRAM, PCRAM or Flash. It has optional and customizable SOC Compute in Memory which enables to further reduce power or increase effective density.
Visit our website at www.numem.com or contact us at info@numem.com.