Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz
Tenstorrent and Movellus Form Strategic Engagement for Next-Generation Chiplet-Based AI and HPC Solutions
Enabling Cross-Foundry IP for Power and Performance Optimization
SUNNYVALE, Calif. -- September 9, 2024 -- Movellus and Tenstorrent announced that Tenstorrent has licensed Movellus’ digital IP family as part of a strategic engagement, for its AI and HPC chiplet solutions. This collaboration aims to leverage the strengths of both companies to develop chiplet-based solutions that enhance performance while optimizing power consumption. Movellus Aeonic Digital IP allows Tenstorrent to leverage advanced clocking techniques to reduce overall energy consumption.
“By collaborating with Movellus and integrating their technology, we are optimizing power efficiency in our processors and continuing to drive Tenstorrent’s leadership in scalable AI chiplets,” said Keith Witek, Chief Operating Officer of Tenstorrent.
Movellus’ Aeonic portfolio offers products designed to tackle critical infrastructure challenges in modern computing, such as on-die sensing, digital clocking, and power delivery. Notably, the digital adaptive clocking family facilitates architectural advancements like per-core distributed clocking and fine-grained dynamic frequency scaling (DFS). Additionally, when coupled with droop detectors, these products provide advanced clock management capabilities, allowing for Vmin reduction by effectively mitigating droop while minimizing any performance impact. With these products it is possible to combine localized clocking, DFS, DVFS, and droop mitigation in a unified solution, simplifying design and easing integration.
“Movellus’ digital clocking technology enables us to distribute digital PLLs across our chip to provide a localized, fine-grained clocking, something that is not possible with traditional analog PLLs,” said Michael Smith, Senior Director of SoC Hardware Engineering at Tenstorrent. “In addition, their process agnostic digital architecture provides a cohesive software interface across multiple devices.”
“Tenstorrent is pioneering AI and HPC compute with their novel and scalable hardware architectures and software stack,” said Mo Faisal, CEO of Movellus. “We are grateful to be a part of this ground-up approach that is foundational to the advancement of AI and HPC compute with an intention of maximizing energy efficiency – a much-needed development in the age of AI.”
AI Hardware Summit Exhibition – September 10-12, 2024 in San Jose
To learn more about Movellus, meet us at the upcoming AI Hardware and Edge AI Summit, https://aihwedgesummit.com/events/aihwedgesummit. Movellus will showcase its award-winning IP portfolio for energy optimization at Booth 68.
About Movellus
Movellus provides critical technology that is integrated into an array of applications ranging from edge AI devices to performance-centric cloud datacenter compute and networking offerings. The company is headquartered in Sunnyvale, CA, with R&D centers in Michigan and Toronto. Visit us at: www.movellus.com
Movellus, the Movellus logo, Aeonic, Aeonic Generate, Aeonic Power, Elevating Silicon, Aeonic Insight, and Intelligent Clock Networks are among the trademarks of Movellus. The term "Movellus" refers to Movellus Circuits Inc and/or its subsidiaries. Other trademarks are the property of their respective owners.
About Tenstorrent
Tenstorrent is a next-generation computing company that builds computers for AI. Headquartered in Toronto, Canada, with U.S. offices in Austin, Texas, and Silicon Valley, and global offices in Belgrade, Tokyo, Bangalore, Singapore, and Seoul, Tenstorrent brings together experts in the field of computer architecture, ASIC design, advanced systems, and neural network compilers. Tenstorrent is backed by Eclipse Ventures and Real Ventures, among others. Learn more at tenstorrent.com.
For more information on Tenstorrent visit www.tenstorrent.com.
|
Related News
- Tenstorrent Licenses Baya Systems' Fabric into next-generation AI and Compute Chiplet Solutions
- Tenstorrent Selects Samsung Foundry to Manufacture Next-Generation AI Chiplet
- Tenstorrent Selects SiFive Intelligence X280 for Next-Generation AI Processors
- Wave Computing Announces Strategic Collaboration with Broadcom For Next-Generation AI DPU ASIC
- Alphawave Semi and Arm to Present on Chiplets for Architecting Next-Generation Terabit AI Networks at the TSMC OIP Ecosystem Forum North America
Breaking News
- Faraday and Kiwimoore Succeed in 2.5D Packaging Project for Mass Production
- Secure-IC unveils its Securyzr™ neo Core Platform at Embedded World North America 2024
- OPENEDGES Technology Achieves ISO 26262 ASIL-B Certification
- Xylon's Updated logiHSSL IP Core Seamlessly Connects Infineon AURIX Microcontrollers with AMD Adaptive SoCs and FPGAs
- Electronic System Design Industry Posts $4.7 Billion in Revenue in Q2 2024, ESD Alliance Reports
Most Popular
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- NVMe Updates Expand Discoverability, Security
- BrainChip Introduces Lowest-Power AI Acceleration Co-Processor
- Bluetooth® V6.0 Channel Sounding RF Transceiver IP Core in 22nm & 40nm for ultra-low power distance aware Bluetooth connected devices
- Boosting Efficiency and Reducing Costs: Silvaco's Approach to Semiconductor Fabrication
E-mail This Article | Printer-Friendly Page |