Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Intel, TSMC to detail 2nm processes at IEDM
By Peter Clarke, eeNews Europe (October 8, 2024)
Intel’s attempts to get back to the leading-edge in chipmaking and foundry TSMC’s steps defining that leading-edge will be on show at this year’s International Electron Devices Meeting (IEDM) coming up in December, in San Francisco.
In a late news paper, researchers from TSMC will unveil the N2 manufacturing process, which is a nominal 2nm process designed for computing in AI, mobile and high-performance computing. In the following paper in the same session Intel engineers will provide details of scaling RibbonFETs, the name Intel gives to its nanosheet transistors.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- Analog Bits to Demonstrate IP Portfolio on TSMC 3nm and 2nm Processes at TSMC 2025 Technology Symposium
- M31 Collaborates with TSMC to Advance 2nm eUSB2 IP Innovation
- Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes
- TSMC Will Not Take Over Intel Operations, Observers Say
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
Breaking News
- BrainChip Collaborates with Chelpis-Mirle on Security Solution
- VeriSilicon Launches the Industry-Leading Automotive-Grade Intelligent Driving SoC Design Platform
- New Audio Sample Rate Converter (ASRC) IP Core from CAST Offers Versatility with High Fidelity
- NEXT Semiconductor Technologies Collaborates with BAE Systems to Develop Next Generation Space-Qualified Chips
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
- Baya Systems, Imagination Technologies and Andes Technology to Present on Heterogeneous Compute Architectures at Andes RISC-V CON Silicon Valley
- Crypto Quantique announces QRoot Lite - a lightweight and configurable root-of-trust IP for resource-constrained IoT devices
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium