400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
SureCore Joins the RISC-V Foundation
SHEFFIELD, England, Nov. 27, 2018 -- SureCore Ltd, the developer of ultra-low power SRAM IP and custom low power memory solutions, has joined the RISC-V Foundation, supporting the drive and adoption of the free and open RISC-V Instruction Set Architecture (ISA).
SureCore's low power technology enhances the RISC-V community's ability to develop leading edge products in power-sensitive embedded markets including IoT, wearable and networking applications. SureCore also offers an Application-Centric SRAM Development Service that delivers customized, verified SRAM implementations that address the demanding power profiles for tomorrow's products.
"We look forward to advancing the RISC-V ecosystem with our process independent, low power PowerMiser and EverOn SRAM IP products. The RISC-V Foundation and sureCore share the same mission: to accelerate access to innovative, extensible technology," says Paul Wells, CEO sureCore Ltd.
"We are delighted to welcome sureCore into the RISC-V Foundation. The need for low-power memory is nearly universal across many applications and we look forward to sureCore's contributions to the RISC-V ecosystem," said Rick O'Connor, Executive Director of the non-profit RISC-V Foundation.
For additional information about sureCore, go to www.sure-core.com.
About sureCore
sureCore Limited is an SRAM IP company based in Sheffield, UK, developing low power memories for current and next generation, silicon process technologies. Its award-winning, world-leading, low power SRAM design is process independent and variability tolerant, making it suitable for a wide range of technology nodes. This IP helps SoC developers meet challenging power budgets and manufacturability constraints posed by leading edge process nodes.
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