NSITEXE Develops Test Chip with Next-generation Semiconductor IP Core Called a DFP
December 13th, 2018 -- NSITEXE Inc. will join the 11th AUTOMOTIVE WORLD to be held at Tokyo Big Sight from Wednesday, January 16 to Friday, January 18, 2019. At the event, NSITEXE will unveil a test chip with a next-generation IP core (Data Flow Processor: DFP) that it is developing, as well as a test circuit board to be presented to potential customers and development partners.
Since being established in September 2017, NSITEXE has been building partnerships with companies including ThinCI Inc., a North American startup with key technology for high-performance semiconductors, to accelerate the development of the DFP.
With an improved R&D system and in closer collaboration with partners including Dai Nippon Printing Co., Ltd.,*1 NSITEXE has developed a system on a chip (SoC) to demonstrate the performance of the DFP and a test circuit board on which to mount this SoC, and started trial production. Moreover, NSITEXE plans to start demonstration tests on the DFP, using the test chip and circuit board in the spring of 2019.
In addition to a DFP, the new SoC has two CPUs: Arm®*2 Cortex®-R52 and Wave Computing MIPS*3 I6500 and multiple interfaces, including LPDDR4 and PCIe. The performance of the DFP when used in a vehicle and when used with different embedded system applications will be demonstrated. A software development kit, drivers, a library, and other tools will be prepared and offered to development partners. Demonstration tests are intended to improve the performance of next-generation DFPs and show to customers in different business fields how the DFP accelerates applications.
NSITEXE will continue to offer better semiconductor technology that brings more benefits to society.
|
Related News
- NSITEXE DR1000C, a RISC-V based parallel processor IP with vector extension (DFP: Data Flow Processor) has been licensed for Renesas' new RH850/U2B Automotive MCUs
- NSITEXE Adopts Synopsys HAPS Prototyping to Validate Data Flow Processor IP
- NSITEXE Achieves First-Pass Silicon Success for High-Performance Data Flow Processor-based SoC Test Chip Using DesignWare IP
- Synopsys Enables First-Pass Silicon Success of High Performance NSITEXE Data Flow Processor-based SoC Test Chip for Autonomous Driving
- NSITEXE Accelerates Delivery of Data Flow Processor IP for Automotive and Industrial Applications Using the Cadence Digital Design Full Flow
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |