MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm) for Automotive
Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process
Shanghai, China—Jun.3, 2021 -- Brite Semiconductor (“Brite”), a leading provider of custom ASIC design, manufacturing and IP, today announced the launch of ONFI (Open NAND Flash Interface) 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process. The IO supports SDR/NV-DDR/NV-DDR2 1.8V, NV-DDR3 1.2V, and the physical layer IP adopts full digital design with features of low power consumption and small area.
The ONFI physical layer IP can be adopted in the ONFI and is compatible with ONFI 4.2/4.1/4.0/3.2 etc. standards. Currently, the IO and physical layer IP is silicon proven on SMIC's 40nm and 14nm FinFET processes.
ONFI 4.2 physical layer IP has the following features:
- Silicon proven on SMIC 14 FinFET and SMIC 40LL process
- Achieve Max 1600Mbps on 14nm FinFET NV_DDR3 1.2V and Max 800Mbps on NV_DDR2 1.8V
- Achieve Max 800Mbps on 40LL
- Support ODT (On-Die Termination) and Impedance calibration
- Compliant with the ONFI 4.2/4.1/4.0/3.2 etc. standard
- Support DQS Gate, Write and Read training
- Adopt All-Digital DLL design
- Adopt APB register interface
“With more than 10 years of successful experience of custom ASIC design, manufacturing and IP development, Brite Semiconductor provides the value to our customers,” said Yadong Liu, VP of Engineering at Brite Semiconductor. “The ONFI IP is silicon proven on SMIC 14nm FinFET process, which can help customers quickly achieve mass production on SMIC’s advanced 14nm process.”
About Brite Semiconductor
Brite Semiconductor is a leading provider of custom ASIC design, manufacturing and IP, and committed to provide flexible one-stop services from architecture design to chip delivery with high value and differentiated solutions.
Brite Semiconductor also provides comprehensive silicon proven “YOU” IP portfolio and YouSiP (Silicon-Platform) solution, which can be widely adopted in 5G, AI, high performance computing, cloud and edge computing, network, IoT, industrial Internet and consumer electronics, etc. YouSiP solution provides a prototype design reference for system house and fabless to to win the market rapidly.
Founded in 2008, Brite Semiconductor is headquartered in Shanghai, China with three subsidiaries in Hefei, Suzhou and Tianjin, and also has sales offices in the US and Taiwan Region.
For more information, please visit www.britesemi.com
|
Brite Semiconductor Hot IP
Related News
- Certus Semiconductor releases ESD library in GlobalFoundries 12nm Finfet process
- Sofics Releases Analog IO's and ESD protection clamps for Advanced Applications using TSMC 7nm FinFET process
- Brite Semiconductor Announces DDR4 IP Achieve 2400 Mbps on SMIC 40nm Process
- Samsung and GLOBALFOUNDRIES Forge Strategic Collaboration to Deliver Multi-Sourced Offering of 14nm FinFET Semiconductor Technology
- Brite Semiconductor Achieves First-Pass Silicon Success with SMIC's 40nm Process
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
- Efinix Rolls Out Line of FPGAs to Accelerate and Adapt Automotive Designs and Applications
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024
E-mail This Article | Printer-Friendly Page |