M31 Promotes Advanced SoC Development and Innovation at Intel Foundry's Direct Connect Event
February 22, 2024 -- M31 Technology Corporation (M31), a member of the Intel Foundry Accelerator IP Alliance, today showcased M31's silicon intellectual properties (IP) R&D capabilities at Intel Foundry's inaugural Direct Connect event, enabling customers to leverage M31's complete IP solutions to further advance system-on-chip (SoC) innovation for advanced applications such as artificial intelligence, high-speed computing, Edge-IOT and automotive.
In globally popular application fields, high complexity in advanced process technology is required. As one of the few global IP providers of advanced process IP technologies, M31 has become a key player in driving semiconductor design innovation. M31 offers a full range of market-leading IP solutions and comprehensive IP integration services to meet designers' specifications and requirements, giving customers an edge in accelerating designs. With M31's competitive performance and latest specification high-speed interface IP products, including USB4, PCIe 5.0, MIPI C/D PHY, etc., customers can accelerate and optimize the required designs for data transfer/storage, image processing, memory, and other related applications by immediately adopting M31's silicon-proven IP solutions portfolio. Moreover, M31 has expanded its R&D capabilities in Foundation IP over the past year, focusing on the development of standard cell libraries, memory compilers, and I/O for advanced manufacturing processes. M31 possesses a comprehensive portfolio of industry-standard IP, coupled with customized technology and R&D experience, enabling customers to seize the time-to-market opportunities.
Scott Chang, CEO of M31, said at the meeting, “M31 possesses a comprehensive portfolio of silicon-proven IP products, and we are also actively developing solutions for extremely advanced processes, expanding IP R&D resources to accelerate product development for our mutual customers and partners, meeting the high-quality and high-performance requirements of SOC design.”
At IFS Direct Connect Event, Left to Right, Suk Lee,VP of Design Ecosystem Development at Intel Foundry Services; Scott Chang, CEO of M31; Kuoshu Chiu, GM of M31 USA
|
M31 Technology Corp. Hot IP
USB 3.2 Gen2/Gen1 PHY IP in TSMC(5nm, 6nm, 7nm,12nm/16nm, 22nm, 28nm, 40nm, 55nm ...
PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and ...
MIPI D-PHY RX/TX v1.1 / v1.2 IP in TSMC (12/16nm, 28nm, 40nm, and 55nm process)
SerDes PHY IP(12nm, 14nm, 22nm, 28nm)
Related News
- Flex Logix Joins Intel Foundry Services Accelerator IP Alliance to Enable Fast, Low Power, Reconfigurable SoC's
- M31 Partners with Intel IFS Alliance to Present Latest IP Development Achievements
- Intel Foundry Gathers Customers and Partners, Outlines Priorities
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- M31's 12nm GPIO IP Adopted by C*Core Technology, Powering Innovation in Advanced Process Automotive Chips
Breaking News
- Weebit Nano Q3 FY25 Quarterly Activities Report
- Codasip launches complete exploration platform to accelerate CHERI adoption
- VSORA Raises $46 Million to Bring World's Most Powerful AI Inference Chip to Market
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
Most Popular
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- CFX 0.13μm eFuse OTP IP has been applied in the mass production of over 15,000 CMOS image sensors
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |