Industry Articles
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Making hardware more like software
(Monday, May 30, 2011)
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It's not just about hardware anymore
(Thursday, May 26, 2011)
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VMM based multi-layer framework for system level verification
(Wednesday, May 25, 2011)
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Power Optimization in Image Superscalar IP
(Monday, May 23, 2011)
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Guidelines for SystemC - Debugger Integration
(Monday, May 23, 2011)
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Overcoming the challenges of formal verification and debug
(Thursday, May 19, 2011)
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Time to exploit IDEs for hardware design and verification
(Thursday, May 19, 2011)
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Securing nonvolatile, nonresettable counters in embedded designs
(Monday, May 16, 2011)
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Advanced Power Management in Embedded Memory Subsystems
(Monday, May 16, 2011)
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STAC: Advanced inter-die communication Technology
(Monday, May 16, 2011)
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SoC realization: Finally the "Killer App" that will allow EDA to grow again?
(Monday, May 16, 2011)
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How to build a fast, custom FFT from C
(Thursday, May 12, 2011)
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Optimize data flow video apps by tightly coupling ARM-based CPUs to FPGA fabrics
(Thursday, May 12, 2011)
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Design optimization of flip-chip packages integrating USB 3.0
(Thursday, May 12, 2011)
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COMSIS 802.11n: an IP to Reuse - a flexible platform for Design
(Monday, May 9, 2011)
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Guidelines for Successful SoC Verification in OVM/UVM
(Monday, May 9, 2011)
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NoC Interconnect Improves SoC Economics
(Monday, May 9, 2011)
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Functional safety poses challenges for semiconductor design
(Thursday, May 5, 2011)
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Embedded antifuse NVM: A mission critical IP for display driver ICs
(Monday, May 2, 2011)
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TLM 2.0 Standard into Action: Designing Efficient Processor Simulators
(Monday, May 2, 2011)
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Scaling a video on demand server
(Thursday, April 28, 2011)
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DSPs with PCI Express interface extend connectivity while improving performance and power efficiency
(Thursday, April 28, 2011)
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An IP-XACT Deployment Case: IZARN IP
(Monday, April 25, 2011)
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Challenges of safety-critical multi-core systems
(Monday, April 25, 2011)
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Facilitating at-speed test at RTL (Part 2)
(Thursday, April 21, 2011)
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Systematic approach to verification of a mixed signal IP - HSIC PHY case study
(Thursday, April 21, 2011)
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Facilitating at-speed test at RTL (Part 1)
(Monday, April 18, 2011)
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Cache Evaluation Software: A Dynamically Configurable Cache Simulator
(Monday, April 18, 2011)
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Using verification coverage with formal analysis
(Thursday, April 14, 2011)
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M-PHY benefits and challenges
(Wednesday, April 13, 2011)
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Analyzing multithreaded applications - Identifying performance bottlenecks on multicore systems
(Monday, April 11, 2011)
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Minimal Effort Chip Design Using IP
(Monday, April 11, 2011)
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CORTEX-R versus CORTEX-M
(Thursday, April 7, 2011)
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How to achieve quality assurance for your electronic designs
(Wednesday, April 6, 2011)
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Implementing Different Power Features in an IP
(Monday, April 4, 2011)
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The Power and Bandwidth Advantage of an H.264 IP Core with 8-16:1 Compressed Reference Frame Store
(Monday, April 4, 2011)
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Attofarad accuracy for high-performance memory design
(Thursday, March 31, 2011)
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Complete NAND Flash Solution: Logic, PHY and File System Software
(Monday, March 28, 2011)
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System awareness improves SOC power management
(Thursday, March 24, 2011)
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Hardware Configuration Management and why it's different than Software Configuration Management
(Thursday, March 24, 2011)
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The real role of EDA in the Cloud
(Thursday, March 24, 2011)
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Using simulation and emulation together to create complex SoCs
(Wednesday, March 23, 2011)
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Analog IP for multimedia SoCs: an eye on a world of essential analog features
(Wednesday, March 23, 2011)
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What makes an optimal SoC verification strategy
(Monday, March 21, 2011)
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What’s the number of ASIC versus FPGA design starts?
(Monday, March 21, 2011)
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The Challenges and Benefits of Analog/Mixed-Signal and RF System Verification above the Transistor Level
(Monday, March 21, 2011)
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Vertically Integrated MIPI Solutions
(Monday, March 21, 2011)
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Verification of USB 3.0 Device IP Core in Multi-Layer SystemC Verification Environment
(Thursday, March 17, 2011)
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Analog switches in D-PHY MIPI dual camera/dual display applications (Part 2 of 2)
(Thursday, March 17, 2011)
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Test tools to empower engineers for PCIe 3.0 designs
(Monday, March 14, 2011)
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