Blogs
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How Standards Are Unleashing the Power of DPUs for Cloud Computing
(Wednesday, June 14, 2023)
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Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads
(Wednesday, June 14, 2023)
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Security for IoT Is a Requirement, Not a Choice
(Tuesday, June 13, 2023)
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"Stay Persistent", Semiconductor Startup Founder Says
(Tuesday, June 13, 2023)
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EDA Must Think Beyond ICs in Automotive Electronics Market, Panel Says
(Tuesday, June 13, 2023)
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When tapas meet tech: Barcelona's RISC-V Summit feeds our appetite for innovation
(Tuesday, June 13, 2023)
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Ethernet IP a game-changer for SOC (System-on-Chip) designers
(Monday, June 12, 2023)
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Early, Accurate, and Faster Exploration and Debug of Worst-Case Design Failures with ML-Based Spectre FMC Analysis
(Friday, June 9, 2023)
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Customer Spotlight: Viettel Accelerates Design of Its First 5G SoC with Synopsys ASIP Designer
(Friday, June 9, 2023)
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Why Aerospace Semiconductor Designers Are Taking a Page from Their Automotive Friends
(Thursday, June 8, 2023)
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Ethernet Time-Sensitive Network (TSN): Synopsys Verification Solution for Complex TSN Specifications
(Wednesday, June 7, 2023)
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Synopsys Tapes Out SLM PVT Monitor IP on TSMC N5 and N3E Processes
(Wednesday, June 7, 2023)
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Which IMG BXS GPU is right for your car?
(Tuesday, June 6, 2023)
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Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics
(Monday, June 5, 2023)
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From Silicon Design to End of Life - Mitigate Memory Failures to Boost Reliability
(Thursday, June 1, 2023)
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Expanding the RISC-V Ecosystem, with PX5, IAR and SiFive
(Wednesday, May 31, 2023)
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NOEL-V: A RISC-V Processor for High-Performance Space Applications
(Monday, May 29, 2023)
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Total Compute Solutions (TCS23) provide the complete platform for mobile computing
(Monday, May 29, 2023)
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Arm GPUs built on new 5th Generation GPU architecture to redefine visual computing
(Monday, May 29, 2023)
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Arm Cortex-A720 and Cortex-A520 CPUs extend Armv9 benefits to all consumer device markets
(Monday, May 29, 2023)
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Arm Cortex-X4 advances frontiers of CPU performance
(Monday, May 29, 2023)
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What is AI Anomaly Detection and Why it needs Explainable AI (XAI)?
(Monday, May 29, 2023)
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Gaming is Next Driver for Bluetooth Low Energy and LE Audio
(Monday, May 29, 2023)
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Gaming is Next Driver for Bluetooth Low Energy and LE Audio
(Sunday, May 28, 2023)
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Generative AI is changing the world - but can it continue to succeed with our current data infrastructure?
(Thursday, May 25, 2023)
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Why we're the GPU of choice for RISC-V
(Thursday, May 25, 2023)
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Designing Smarter Edge AI Devices with the Award-Winning Synopsys ARC NPX6 NPU IP
(Thursday, May 25, 2023)
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Update: China may Win in AI Computing
(Wednesday, May 24, 2023)
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New Synopsys Report Highlights Key Industry Insights on the Impact of Multi-Die Systems
(Wednesday, May 24, 2023)
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No one-size-fits-all approach to RISC-V processor optimization
(Tuesday, May 23, 2023)
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How does Post-Quantum Cryptography affect the TLS protocol?
(Tuesday, May 23, 2023)
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Cadence Welcomes Pulsic, Ltd
(Tuesday, May 23, 2023)
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Can the Semiconductor Industry Overcome Thermal Design Challenges in Multi-Die Systems?
(Tuesday, May 23, 2023)
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Cadence Collaboration with Kudan and Visionary.ai Enables Rapid Deployment of VSLAM and AI ISP-Based Solutions
(Monday, May 22, 2023)
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How Vehicle Design Is Influencing Processors
(Monday, May 22, 2023)
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How Multi-Die Systems Create New Business Opportunities for Semiconductor Companies
(Monday, May 22, 2023)
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Designing Chips in the Cloud: Four Key Takeaways from SNUG Silicon Valley 2023
(Monday, May 22, 2023)
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Shifting left for success: Highlights from the Siemens EDA User 2 User conference
(Wednesday, May 17, 2023)
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How Cloud IC Verification Reduced DRC Runtimes by 65%
(Wednesday, May 17, 2023)
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Expanded access to Arm Virtual Hardware for the entire IoT ecosystem
(Thursday, May 11, 2023)
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What Does the Future Hold for AI in Chip Design?
(Wednesday, May 10, 2023)
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NAND Flash Memory - Key Element For Your Multi-Die Systems Verification - Part 1
(Tuesday, May 9, 2023)
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How to Shift Left on Low-Power Design Verification, Early and Quickly
(Tuesday, May 9, 2023)
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Pre and Post-Silicon Verification Have Never Been Closer! Leveraging Portable Stimulus for Automatic Test Equipment (ATE)
(Monday, May 8, 2023)
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Synopsys Acquires Silicon Frontline Technology
(Monday, May 8, 2023)
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An Introduction about ATPG in VLSI
(Friday, May 5, 2023)
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Imparé Imparts Its Insights on Verification in the Cloud
(Thursday, May 4, 2023)
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Low-Power IC Design: What Is Required for Verification and Debug?
(Wednesday, May 3, 2023)
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How the CXL Standard Improves Latency in High-Performance Computing
(Wednesday, May 3, 2023)
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RISC-V customization, HW/SW co-optimization, and custom compute
(Tuesday, May 2, 2023)
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