Blogs
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Inflexibility? That’s so 2009 :)
(Thursday, November 18, 2010)
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Tablet Sales Could Double; ARM Needs To Watch Intel
(Wednesday, November 17, 2010)
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The Chinese Tianhe-1A supercomputer: It's the interconnect, stupid!
(Wednesday, November 17, 2010)
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Design-Lite - new model for semiconductor development: Taher Madraswala
(Wednesday, November 17, 2010)
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Look ahead to Oct. 2010 global semicon sales: Cowan LRA model
(Wednesday, November 17, 2010)
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Gary Smith EDA on the future of Chip Design
(Wednesday, November 17, 2010)
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Are low power and FPGA an oxymoron?
(Wednesday, November 17, 2010)
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Need really big FPGAs? Xilinx will be taking the "3D" route for initial Virtex 7 parts
(Wednesday, November 17, 2010)
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IP Reuse - There's an Elephant in the Room
(Tuesday, November 16, 2010)
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eSilicon
(Tuesday, November 16, 2010)
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The "sort-of" FPGA
(Tuesday, November 16, 2010)
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Optimizing ARM SoCs through Core, Memory, Power and Process Improvements
(Tuesday, November 16, 2010)
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CPUs Have Been Doing GPU Computing Badly for Years
(Monday, November 15, 2010)
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The era of superintegration: The Marvell and ARM story - more than one billion chips served
(Friday, November 12, 2010)
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ARM Cortex-A15 - does this processor IP core need a new category ... Superstar IP?
(Thursday, November 11, 2010)
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Intel Opens the Factory Door. A Little.
(Thursday, November 11, 2010)
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EDA 'co-opertition' - a new era or more lip service?
(Thursday, November 11, 2010)
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1GHz+ Cortex-A9 Implementation with ARM Artisan POP
(Thursday, November 11, 2010)
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EDA360: Apps, Android, Apple
(Thursday, November 11, 2010)
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Realizing the ARM Cortex-A15: What does the road to 2.5GHz look like?
(Wednesday, November 10, 2010)
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IP Selection/Integration in the World of Security IP
(Wednesday, November 10, 2010)
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Intel says Moore's Law alive and well and living at 32nm
(Tuesday, November 9, 2010)
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70% of re-spin issues are AMS in nature: How mixed-signal design can mess up a perfectly good SoC
(Monday, November 8, 2010)
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8 Bits is Dead
(Monday, November 8, 2010)
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TSMC Versus Intel?
(Monday, November 8, 2010)
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Arm vs. Intel: Who's David? Who's Goliath?
(Monday, November 8, 2010)
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How complex is your chip design?
(Monday, November 8, 2010)
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Bluetooth set as short range wireless standard for smart energy!
(Thursday, November 4, 2010)
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Who said 16-bit is dead?
(Thursday, November 4, 2010)
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NXP Capacity Cuts Cause Flat Sales In 30% Growth Year
(Thursday, November 4, 2010)
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Outsourcers Look To China, As Obama Goes To India
(Thursday, November 4, 2010)
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Cadence Low-power Verification: Tear Down These Walls
(Thursday, November 4, 2010)
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Was Fab-Lite A Fad?
(Thursday, November 4, 2010)
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Using Scoreboards and Virtual Platforms for Software Verification
(Thursday, November 4, 2010)
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Achronix's foundry pact with Intel: how big a deal?
(Thursday, November 4, 2010)
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Intel opens manufacturing doors to Achronix! Becomes mini foundry?
(Tuesday, November 2, 2010)
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Why Is Intel Fabbing Achronix FPGAs?
(Tuesday, November 2, 2010)
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TSMC 2011 Forecast and 28nm Update!
(Monday, November 1, 2010)
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Xilinx announces first stacked silicon interconnect technology
(Friday, October 29, 2010)
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Percello’s acquisition by Broadcom
(Friday, October 29, 2010)
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Why has the semicon equipment bubble really burst? - II
(Thursday, October 28, 2010)
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What does Cadence mean when it calls System Realization a "holistic" approach to IC design?
(Thursday, October 28, 2010)
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Cadence EDA360 Highlights Mixed Signal as Key
(Thursday, October 28, 2010)
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Weakness In Consumer Chip Markets
(Thursday, October 28, 2010)
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Driving An HDMI Ecosystem Part 2 - IP Vendor's Perspective
(Thursday, October 28, 2010)
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Why has the semicon equipment bubble really burst?
(Wednesday, October 27, 2010)
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CDN LIVE 2011 Trip Report: Realizing EDA360
(Wednesday, October 27, 2010)
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Why FPGAs are better than DSPs for Motor Control ?
(Wednesday, October 27, 2010)
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The Increasingly Hazardous World of FPGA Verification
(Tuesday, October 26, 2010)
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Best Practices For Multicore SoC Test And Debug
(Monday, October 25, 2010)
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