Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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arrow Embedded Memories (994)
arrow I/O Library (1032)
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2827 IP
351
2.0
I2C IO Pad Set
The I2C library provides open-drain bi-directional I/O cells designed for the I2C two-line interface. It is compliant with the I2C-bus specification –...
352
2.0
I2C IO Pad Set
The I2C library provides the bidirectional I/O for two-line serial communication per Rev. 4 of the I2C-bus industry specification. The design is comp...
353
2.0
I2C IO Pad Set
...
354
2.0
I3C I/O Library
The I3C library provides a bi-directional I/O driver designed for the I3C two-line interface. It is compliant with the MIPI Specification for I3C –Ver...
355
2.0
ICC I/O Pad Set
The ICC library provides the bidirectional reset, clock, and data I/O drivers for the smart card UICC terminal interface. This library has been desi...
356
2.0
PCI IO Pad Set
The PCI 3.0 library provides the driver / receiver and required support cells for PCI 3.0 signaling. The cells are compliant with the PCI Local Bus S...
357
2.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell for SD 3.0 signaling. The library is compliant with the SD Specifications, Part 1, Physical Layer S...
358
2.0
SD 3.0 I/O Pad Set
The SD library provides the driver / receiver cell and required support cells for SD 3.0 signaling. Fault-tolerant operation. This library is offere...
359
2.0
DDR3 / DDR4 Combo I/O Pad Set
The DDR3 / DDR4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full compleme...
360
2.0
DDR3_DDR4 IO Pad Set
The DDR3 / DDR4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full compleme...
361
2.0
General-Purpose I/O (GPIO) - 1.5V-1.8V
The 1.8V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog powe...
362
2.0
General-Purpose I/O (GPIO) - 1.5V-1.8V
The 1.8V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog powe...
363
2.0
RF I/O Pad Set and Discrete RF ESD Protection Components
The RF libraries include analog signal pads and ESD protection components for RF applications. These libraries are offered as a supplement to the stan...
364
2.0
RF I/O Pad Set and Discrete RF ESD Protection Components
The RF library include analog signal pads and ESD protection components for RF applications. This library is offered as a supplement to the IO librar...
365
2.0
RGMII / GMII Combo I/O Pad Set
The (R)GMII libraries provide the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigab...
366
2.0
RGMII IO Pad Set
The (R)GMII libraries provide the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Giga...
367
2.0
RGMII IO Pad Set
The (R)GMII library provides the combo driver / receiver and required support cells for (R)GMII signaling. The libraries are compliant with the Gigabi...
368
2.0
RGMII IO Pad Set
The (R)GMII / SMII Combo library provides the driver / receiver cell for GMII, RGMII, and SMII signaling along with a full complement of I/O power, co...
369
2.0
CI Plus
The CI Plus library provides a programmable bi-directional I/O cell designed to meet the signal interface requirements of the Common Interface. This l...
370
2.0
High-Speed LVDS (SERDES) Transceiver
High-speed LVDS (SERDES) transceiver with up to 8 serial data lanes, generic data width and integrated asynchronous FIFO. Ideal for standard LVDS link...
371
2.0
Digital Cell Library
The agileDSCL is a compact digital standard cell library customizable for specific foundries and processes, and optimized for low-power, ultra-low-lea...
372
2.0
Single Port Register File compiler - Memory optimized for high density and high speed - Dual voltage - compiler range up to 40 k
Single Port Register File compiler - TSMC 90 nm LPeF - Memory optimized for high density and high speed - Dual voltage - compiler range up to 40 k...
373
2.0
Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k
Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLPeFlash - Memory optimized for high density and low power - Dual Voltage - compi...
374
2.0
Single Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 40 k
Foundry sponsored - Single Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler ra...
375
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
Foundry sponsored - Single Port SRAM compiler - TSMC 180 nm uLL_HV - Memory optimized for high density and Low power - compiler range up to 320 k...
376
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
Single Port SRAM compiler - TSMC 180 nm BCD Gen2 - Memory optimized for high density and Low power - compiler range up to 320 k...
377
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for high density and Low power - compiler range up to 640 k...
378
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 55 nm HV - Memory optimized for high density and Low power - compiler range up to 640 k...
379
2.0
Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm LPeF - Memory optimized for high density and Low power - compiler range up to 640 k...
380
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler range up to 64 k
Single Port SRAM compiler - TSMC 130 nm BCD Plus - Memory optimized for ultra high density and high speed - compiler range up to 64 k...
381
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - compiler up to 64 k
Foundry Sponsored - Single Port SRAM compiler - TSMC 130 nm BCD - Memory optimized for ultra high density and high speed - compiler up to 64 k...
382
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range up to 640 k
Foundry Sponsored - Single Port SRAM compiler - TSMC 85 nm UP - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range...
383
2.0
Single Port SRAM compiler - Memory optimized for ultra high density and low power - compiler range up to 576 k
Single Port SRAM compiler - TSMC 40 nm LP - Non volatile Memory optimized for ultra high density and low power - compiler range up to 576 k...
384
2.0
Single Port SRAM compiler - Memory optimized for ultra low leakage and high density - Dual Voltage - compiler range up to 640 k
Foundry sponsored - Single Port SRAM compiler - TSMC 90 nm uLL - Memory optimized for ultra low leakage - Dual Voltage - compiler range up to 640 k...
385
2.0
Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
Single Port SRAM compiler - TSMC 180 nm G - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k...
386
2.0
Pipelined Divider
Function y = a / b is a very high-speed divider with configurable dividend and divisor width. Inputs and outputs may be specified as either signed or...
387
2.0
Pipelined Multiplier
Function y = a * b is a high-speed multiplier with configurable width and depth. Inputs and outputs may be specified as either signed or unsigned val...
388
2.0
Pipelined Square Root
Function y = √x is a fully scalable square-root function with configurable data width. Inputs and outputs are unsigned integers. An n-bit input valu...
389
2.0
Fixed-point to Floating-point Converter
Converts fixed-point numbers to 32-bit floating-point representation. The fixed-point input has a configurable word and fraction width. Floating-point...
390
2.0
Floating-point Adder
High-speed fully pipelined 32-bit floating-point adder/subtracter based on the IEEE 754 standard. Results have a latency of 5 clock cycles. Ideal f...
391
2.0
Floating-point Divider
High-speed fully pipelined 32-bit floating-point divider based on the IEEE 754 standard. Features a generic latency from 2 to 49 clock cycles. Ideal ...
392
2.0
Floating-point Multiplier
High-speed fully pipelined 32-bit floating-point multiplier based on the IEEE 754 standard. Results have a latency of only 4 clock cycles. Ideal for ...
393
2.0
Floating-point Square-root
High-speed fully pipelined 32-bit floating-point square-root function based on the IEEE 754 standard. Features a generic latency from 2 to 24 clock cy...
394
2.0
Floating-point to Fixed-point Converter
Converts 32-bit floating-point numbers to fixed-point representation. The fixed-point output has a configurable word and fraction width. Floating-poin...
395
2.0
SMBus IO Pad Set
The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface. It is compliant with the Rev 3.1 ...
396
2.0
CML I/O Pad Set
The CML library provides a differential clock driver, a voltage reference, and power cells to support REFCLK signaling for PCIe applications....
397
2.0
CML I/O Pad Set
The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along with a CML voltage refe...
398
2.0
ONFI 4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
399
2.0
ONFI 4.1 I/O Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to supp...
400
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...