Design & Reuse
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arrow Processor Cores (46)
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20 IP
1
30.0
zstd compression and decompression IP core
The zstd (Zstandard) compression algorithm is an advanced, lossless data compression technology. It has quickly become a popular choice for a variety ...
2
30.0
LZ4 compression and decompression IP core
The LZ4 compression algorithm is a fast, lossless data compression technology renowned for its high-speed performance and low latency. LZ4 offers impr...
3
20.0
2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load
GV580 is a Gen 4 2D (vector graphics) GPU IP with 3D drawing functions. With further advanced architecture for minimized CPU load in 2D graphics proce...
4
14.0
Scalable 3D Graphics Accelerator
The logi3D graphics accelerator IP core is specifically designed for the new Xilinx Zynq-7000 All Programmable SoC. Designers can add attractive 3D gr...
5
13.0
Perspective Transformation and Lens Correction Image Processor
The logiVIEW Perspective Transformation and Lens Correction Image Processor IP core for video and imaging applications using single or multiple camera...
6
4.0
ADPCM G.726 Codec
The NTadpcm core is fully compliant with G.726 standard and supports up to 64 full duplex voice channels. The core is used in applications that requir...
7
4.0
OFDM Baseband Processor
Noesis Technologies ntOFDM_BBP is a custom baseband processor, which implements the physical layer of an OFDM, time division duplexing (TDD) system. T...
8
3.0
Kalman Filter hardware accelerator
The eSi-Kalman core provides hardware acceleration for Kalman Filtering (KF) and related target tracking algorithms, such as measurement to track asso...
9
3.0
Bit Block Transfer 2D video accelerator
The logiBITBLT is 2D graphic accelerator or BitBlitter IP core from Xylon logicBRICKS™ IP library. BITBLT is an acronym that stands for Bit Block Tran...
10
3.0
Bitmap 2.5D Graphics Accelerator
The logiBMP is 2.5D graphics accelerator from Xylon logicBRICKS IP library, optimized for Xilinx FPGAs and designed to speed up graphics operations wi...
11
3.0
Constant False Alarm Rate Processor (CFAR)
The eSi-CFAR is an high throughput Constant False Alarm Rate (CFAR) IP core, whose main application area is automotive driver assistance radar. It is ...
12
1.0
Digital Signal Processor IP
ZSPNano is the perfect choice for Always ON applications involving sound detection, voice quality enhancement and command recognition. It is a tiny, e...
13
1.0
Digital Signal Processor IP
ZSPNano+ is a small, energy efficient, Digital Signal Processor Core for high performance Voice/Audio/Wireless applications. The compiler friendly arc...
14
1.0
Digital Signal Processor IP
VeriSilicon's programmable ZSP Digital Signal Processor IP is a series of processor cores optimized for signal processing computation and data streami...
15
1.0
Digital Signal Processor IP
VeriSilicon's programmable ZSP Digital Signal Processor IP is a series of processor cores optimized for signal processing computation and data streami...
16
1.0
Digital Signal Processor IP
VeriSilicon's programmable ZSP Digital Signal Processor IP is a series of processor cores optimized for signal processing computation and data streami...
17
0.0
GUNZIP/ZLIB/Inflate Data Decompression Core
ZipAccel-C is a custom hardware implementation of a lossless data compression engine that complies with the Deflate, GZIP, and ZLIB compression standa...
18
0.0
LZ4/Snappy Data Compressor
LZ4SNP-C is a custom hardware implementation of a lossless data compression engine that complies with the LZ4 and Snappy compression standards. The co...
19
0.0
LZ4/Snappy Data Decompressor
LZ4SNP-D is a custom hardware implementation of a lossless data decompression engine for the LZ4 and Snappy compression algorithms. The core receives ...
20
0.0
GZIP/ZLIB/Deflate Data Compression Core
ZipAccel-D is a custom hardware implementation of a lossless data decompression engine that complies with the Inflate/Deflate, GZIP/GUNZIP, and ZLIB c...