Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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15 IP
1
95.0
Tessent AI IC debug and optimization
The multicore architectures of SoCs for machine learning (ML) and artificial intelligence (AI) applications provide unique challenges for development,...
2
95.0
Tessent Automotive IC debug and optimization
Vehicles are becoming highly complex systems approaching billions of lines of code....
3
95.0
Tessent in-life monitoring
The Tessent Embedded Analytics solution can be used to produce health and operational metrics throughout the lifecycle of an SoC. Embedded software ba...
4
95.0
Tessent SoC debug and optimization
Tessent Embedded Analytics accelerates debug, validation, and optimization of complex multi-core SoCs. Leveraging embedded non-intrusive instrumentati...
5
95.0
Tessent Static Instrumentation
The Tessent Embedded Static Instrumentation module provides a nonintrusive mechanism for code instrumentation. Software engineers can insert watchpoin...
6
95.0
Tessent Status Monitor
The Tessent Embedded Analytics Status Monitor provides visibility and monitoring of any circuitry within a System-on-Chip (SoC). It affords many of th...
7
95.0
Tessent UltraSight-V
Tessent UltraSight-V, part of the Tessent Embedded Analytics product family, is a comprehensive solution for RISC-V based SoCs. With a combination of ...
8
4.0
12-bit 250MHz Decimation filter with 43 taps
The ODT-DSP-DEC-43T250M-T16 is a 12-bit 250MHz Decimation filter with 43 taps in a 12/16nm CMOS process. The 43 Tap Decimation filter reduces the out...
9
4.0
12-bit 250MHz interpolation filter with 43 taps
The ODT-DSP-INT-43T250M-T16 is a 12-bit 250MHz interpolation filter with 43 taps in a 12/16nm CMOS process. The 43 Tap interpolation filter increases...
10
3.0
MIMO Sphere Decoder
The VK-402 searches only within a fixed number of lattice points, where the number of considered lattice points decreases as we descend from level N. ...
11
3.0
SPDIF AES3 Configurable Receiver
The SPDIF-Rx-Pro (CWda14) is a digital audio receiver IP core supporting the SPDIF, AES3 and IEC60958 standards and also adds hardware support for the...
12
3.0
SPDIF AES3 Configurable Transmitter
The SPDIF-Tx-Pro (CWda15) is a digital audio transmitter IP core supporting the SPDIF IEC60958 and AES3 standards for PCM audio and the IEC61937 and S...
13
0.0
128-Point FFT/IFFT
The FFT4T core implements a 128 point complex FFT and IFFT over 12 data streams in hardware. It runs at the clock frequency four times higher than the...
14
0.0
Hardware NLM (Non-Local-Mean) Video Noise Reduction IP core
NLM (Non Local Mean) is a noise reduction algorithm wherein the value of each pixel is determined a rectangle of pixels around that pixel (a “center p...
15
0.0
Digital filter with input sampling rate 2.56 MHz
The block consists of 4 low pass filters connected in serially. Decimation takes place during a filtration process after each stage. The total decim...