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16 IP
1
30.0
All in one solution for AI in RISC-V
...
2
14.0
Tensilica FloatingPoint KP1/KP6 DSPs
High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area Cadence® Tensilica® FloatingPoint KP1/KP6 D...
3
14.0
Tensilica FloatingPoint KQ7/KQ8 DSPs
Super-high-performance DSPs specifically optimized for floating-point workload with exceptional PPA Cadence® Tensilica® FloatingPoint KQ7 and KQ8 DSP...
4
0.118
24-bit digital signal processor soft core.
24-bit digital signal processor soft core....
5
0.118
16-bit digital signal processor soft core.
16-bit digital signal processor soft core....
6
0.118
16-bit digital signal processor soft core._x005F_x005F_x005F_x005F_x005F_x000D_
16-bit digital signal processor soft core....
7
0.0
16-bit Fixed-Point DSP
The iniDSP is designed for system-on-chip applications. A highest degree of reusability is guaranteed by having a 100% technology independent design, ...
8
0.0
Tensilica ConnX 220/230
Ultra-high performance supports rich data types and accelerations for the computation needs in the compute chain of radar, lidar The Cadence Tensilic...
9
0.0
Tensilica HiFi 5s DSP
Performance leader melding AI/ML, audio/voice, and lightweight vision DSP performance with auto-vectorization for fast time to m Blending a neural ne...
10
0.0
Tensilica MathX 110/130 DSPs
High-performance DSPs designed for floating-point-centric processing with ultra-low energy and small area Cadence® Tensilica® FloatingPoint KP1/KP6 D...
11
0.0
Tensilica MathX 230/240 DSPs
Super-high-performance DSPs specifically optimized for floating-point workload with exceptional PPA Cadence® Tensilica® FloatingPoint KQ7 and KQ8 DSP...
12
0.0
Tensilica Vision 331 DSP
512-bit SIMD, a single DSP for vision, radar, lidar, and AI. Offers up to 2.11 TOPS of performance The Cadence® Tensilica® Vision Q7 DSP delivers up ...
13
0.0
Tensilica Vision 341 DSP
Built using 1024-bit SIMD, single DSP for vision, radar, lidar, and AI and offering up to 4.22 TOPS of performance The Cadence® Tensilica® Vision Q8 ...
14
0.0
Merge Sort Core
This Merge Sort module is written in VHDL, capable of being used on any FPGA/ASIC architecture....
15
0.0
AI data compression option on VPX cores
The Synopsys ARC® VPX DSP IP family is optimized for the unique power, performance and area (PPA) requirements of embedded workloads such as IoT senso...
16
0.0
Complex DSP Engine Core
This is a configurable complex DSP core for signal processing application on programmable logic devices. The core can be configured to perform some of...
