Design & Reuse
59 IP
51
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TSMC CLN3FFE GLink 2.3LL Die-to-Die PHY
IGPD2DZO1A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions, Integrated Fan-Out (InFO) with the ...
52
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TSMC CLN5FF GLink 2.0 Die-to-Die PHY
IGPD2DY01A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL ...
53
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TSMC CLN5FF GLink 2.3LL Die-to-Die PHY
IGAD2DY04A is a high-speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL...
54
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TSMC CLN5FF GLink GPIO
IGID2DY01A GLink GPIO is one of the GLink series IPs. It provides low speed (up to 500 MHz) connection between two dies without requiring any initiali...
55
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TSMC CLN5FF GLink-3D Die-to-Die Master PHY
IGAD2DY02A is a GLink-3D high speed die-to-die interface Master PHY. It is used to transmit data between dies and assembled using TSMC System on Integ...
56
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TSMC CLN6FF/7FF Die-to-Die Interface PHY
This IGAD2DX01A test report shows the functional and characterization test result of GUC Die-to-Die Interface PHY IP for 8 Gbps operation. For IP deta...
57
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TSMC CLN7FF GLink-3D Die-to-Die Slave PHY
IGAD2DX03A is a GLink-3D high speed die-to-die interface Slave PHY. It is used to transmit data between dies and assembled using TSMC System on Integr...
58
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XSR PHY for TSMC N5
The Synopsys USR/XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip m...
59
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Automotive-Compliant Synopsys UCIe Controller IP
Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...