Design & Reuse
Catalog of SIP Cores
System on Chip design resources
15 IP
1
1.0
SMIC 0.18um PCI-X IO
The PCI-X transceiver is a IP version of PCI-X I/O pads, which is fully compatible with PCI-X R1.0 specification....
2
0.118
PCI-X Controller IP, PCIX 1.0b, Soft IP
PCI-X 1.0b device/host bridge controller....
3
0.0
32-bit PCI Bus Master/Target
32-bit PCI Bus Master/Target with configurable FIFOs and AHB back end...
4
0.0
32-bit, 33 MHz PCI Target Interface Core
The main PCI-T32 Interface core purpose is to isolate the user from having to solve complex problems of the PCI interface implementation and let the u...
5
0.0
32-bit/33,66Mhz PCI Host Bridge
...
6
0.0
PCI 32-bit, 33 MHz Multifunction Target Interface
The PCI-T32MF implements a target-only PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up t...
7
0.0
PCI AMBA AHB Device/Host Bridge
This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices. The bridge supports H...
8
0.0
PCI Master/Target Interface Core
...
9
0.0
PCIe 3.1 for GLOBALFOUNDRIES
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 8Gb...
10
0.0
PCIe 3.1 for Intel
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 8Gb...
11
0.0
PCIe 3.1 for Samsung
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 8Gb...
12
0.0
PCIe 3.1 for TSMC
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 8Gb...
13
0.0
SerDes PHY IP(12nm, 14nm, 22nm, 28nm)
M31 SerDes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. The SerDes IP suppo...
14
0.0
PHY for PCIe 6.0 and CXL for Samsung Automotive
Most advanced PHY and Controller for HPC, AI, ML, Data communications, networking, and storage systems The Cadence® PHY IP for PCI Express® (PCIe®)...
15
0.0
Multi-Function PCI Master/Target Interface Core
The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up...