Design & Reuse
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119 IP
51
10.0
I2C & SMBus Controller
The I2C-SMBUS core implements a serial interface controller for the Inter-Integrated Circuit (I2C) bus and the System Management Bus (SMBus). The cor...
52
10.0
I2C and SPI Master/Slave Controller
The I2CSPI-CTRL is a compact and versatile serial interface controller supporting both SPI (Serial Peripheral Interface) and I2C (Inter-Integrated Cir...
53
10.0
SPD5118 Hub Controller IP
The SPD5 Hub function controller IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temperature Sen...
54
9.0
I2C Controller
I²C (Inter-Integrated Circuit) Controller is a two-wire, bi-directional serial bus that provides simple and efficient method of data transmission over...
55
9.0
I2C Slave
The I²C slave IP is fully synthesizable core and compatible with Phillips I²C standard. The IP uses I²C Bus Protocol which helps maximize the hardware...
56
6.0
I2C Master/Slave Controller Core IP
I2C Master/Slave Controller core implements a bidirectional serial interface compatible with the NXP’s I2C bus specification and supports all transfer...
57
5.0
I2C Master Serial Interface Controller
The CC-I2C_MST-AXI is a synthesisable Verilog model of a I2C serial interface controller. The I2C core can be efficiently implemented on FPGA and ASIC...
58
5.0
MIPI-I3C Combo IP Host/Target HDR-DDR compliance with Spec v1.1.1
MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication. The MIPI I3C interface has been develope...
59
4.0
I2C Master Controller
The ntI2C_M is an I2C-bus multi-master interface controller and provides a cost-effective solution for a wide range of applications that require a low...
60
3.0
A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V to 5V GPIO, 1.8V to 5V analog, with ultra low-cap/low-leakage RF solutions.
This silicon proven flip-chip compatible library in TSMC 180nm BCD features a multi-voltage GPIO, 1.8V to 5V analog I/O, and ultra-low capacitance and...
61
3.0
A TSMC 28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
A key attribute of the Certus 28nm IO library is its ability to detect and dynamically adjust to a VDDIO supply of 1.8V or 3.3V during system operatio...
62
3.0
A Wirebond/Flipchip compatible I/O Library with 5V GPIO, 5V ODIO, 5V Analog I/O and 5V Power Supply I/O
This silicon-proven, I/O Library features a 5V General Purpose I/O, 5V Open-Drain I/O, 5V Analog I/O, 5V Power Supply and an area efficient 5V ESD pro...
63
3.0
1.8V/3.3V Fail-Safe Multi-Voltage GPIO
This silicon-proven TSMC 28nm Digital I/O Library delivers a high-performance, low-power interface solution designed for advanced digital applications...
64
3.0
1.8V/3.3V flipchip I/O library with 4kV HBM ESD protection, I2C compliant ODIO
This library is a production-quality, silicon-proven I/O library in TSMC 12nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V o...
65
3.0
1.8V/3.3V Flipchip I/O Library with 4kV HBM, I2C Compliant ODIO and 5V Hot-Plug Detect
This library is a production-quality, silicon-proven I/O library in TSMC 16nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V o...
66
3.0
I2C Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-I2C-MS-AHB Controller IP Core interfaces a microprocessor via the AHB system Interconnect Fabric to an I2C Bus. The I2C is a t...
67
3.0
I2C Master / Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-MS-APB Controller IP Core interfaces a microprocessor via the APB system Interconnect Fabric to an I2C Bus. The I2C is a t...
68
3.0
I2C Master Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-M-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...
69
3.0
I2C Slave Controller - Low Power, Low Noise Config of User Registers
The DB-I2C-S-SCL-CLK is an I2C Slave Controller IP Core focused on low power, low noise ASIC / ASSP designs requiring the configuration & control of r...
70
3.0
I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus)
The Digital Blocks DB-I2C-S-APB / DB-I2C-S-AHB / DB-I2C-S-AXI / DB-I2C-S-AVLN Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC,NIOS II or othe...
71
3.0
Three-Speed Inline I/O Library with ODIO in TSMC 22nm
This silicon-proven, flip chip library in TSMC 22nm boasts three variants of GPIOs and one ODIO. All GPIO and ODIO cells have NS and EW orientation. A...
72
3.0
Inline Wirebond 1.8V to 3.3V Multi-Voltage GPIO with 5V Open-Drain I/O
This I/O Libraru is a high-performance I/O solution for TSMC 22nm technology, supporting both digital and analog interfaces. Designed for 1.8V3.3V op...
73
3.0
Controlled Impedance Multi-Protocol I/O Library featuring three I/O cells
This I/O library is a high-performance GPIO solution designed for the TSMC FFC/FCC+ process. This flipchip compatible library provides a robust and fl...
74
3.0
Specialized 1.2V to 3.3V Fail-Safe GPIO and 3.3V I2C Open-Drain, SPI in TSMC 110nm
This silicon proven, wirebond and flipchip compatible library is particularly tailored to address gaps in the native foundry IO offerings for this nod...
75
3.0
Hs-Mode I2C Controller - 3.4 Mbps, Master / Slave w/FIFO
The Digital Blocks DB-I2C-MS-Hs-Mode Controller IP Core interfaces a microprocessor via the AMBA AXI / AHB / APB Bus or Avalon / Qsys Bus to an I2C Bu...
76
3.0
TSMC 22nm ULL Wirebond I/O Library with ultra-low leakage 1.8V GPIO, 1.8V I2C ODIO and 1.8V Analog Cell
This is an ultra-low leakage library. The GPIO has a typical leakage of only 150pA from VDDIO and 1nA from VDD. The library has a GPIO and an ODIO. Th...
77
3.0
TSMC 22nm ULL Wirebond/Flipchip I/O Library with switchable 1.8V/3.3V GPIO, 3.3V I2C ODIO, and 3.3V Analog Cell
This is an ultra-low leakage library. The GPIO has a worst-case leakage of only 425nA. It works with a wide VDDIO supply range from 1.8V to 3.3V durin...
78
2.0
A 65nm/55nm Wirebond IO Library with 1.2V to 3.3V GPIO and 5V ODIO
Full Custom IO Library. Multi-voltage GPIO Library. Includes 5V Open-Drain; precision PWM Output, 1.2V to 3.3V GPIOs and Analog/RF IOs. Also include ...
79
2.0
1.8V & 3.3V Radiation Hardened GPIO with Optimized LDO
This radiation-hardened, by design, library features both a 1.8 and 3.3V GPIO with multiple drive strengths of 2mA, 4mA,8mA, and 16mA, along with a fu...
80
2.0
I2C Master
The MI2CM macro implements a synchronous single-chip I2C Master only Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus is ca...
81
2.0
I2C Master Serial Interface Controller
Master serial interface compatible with the popular Philips® I2C standard. Features a simple command interface and permits multiple I2C slaves to be c...
82
2.0
I2C MAster Slave
The MI2CMS macro implements a synchronous single-chip I2C Master and Slave Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus...
83
2.0
I2C Slave
The MI2CS macro implements a synchronous single-chip I2C Slave Macro capable of linking one CPU to one I2C-bus. Communication with I2C-bus is carried ...
84
2.0
I2C Slave Serial Interface Controller
Slave serial interface compatible with the popular Philips® I2C standard. Permits an I2C Master to communicate with your FPGA, CPLD or ASIC device. A...
85
2.0
I3C and I2C Combo
It supports standard I3C, high-speed I3C, and Ultra-higher-speed I3C modes. Push-pull operation in I3C modes. Supports I2C standard mode, fast mode, f...
86
2.0
High speed 3.3V I/0 Library with 8kV ESD protection in TPSCo 65nm technology
Featuring 8kV ESD protection, this library ensures robust reliability in challenging environments, with capabilities including 8kV HBM and 500V CDM ES...
87
2.0
Flipchip 5V Fail-Safe GPIO, 5V GPIO, 5V GPI and I2C Compliant 5V ODIO
This flip-chip compatible library in Dongbu HiTek 130nm features a fail-safe GPIO, two standard GPIOs, a 5V GPI, and 5V I2C-compliant ODIO. The GFGPIO...
88
2.0
IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
Certus Semiconductor has a long history of working across a broad range of technology nodes from 180nm down to the latest FinFet offerings. Our I/O s...
89
2.0
Specialized 1.2V to 3.3V Fail-Safe GPIO and 3.3V I2C Open-Drain in 110nm
This silicon-proven Wirebond compatible library in Dongbu HiTek 110nm features a multi-voltage, multi-standard General Purpose Input Output with an Op...
90
2.0
Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings
Certus is pleased to offer I2C open-drain IOs across multiple process technologies. The Certus I2C IO can support external supplies of 1.8V, 3.3V and...
91
1.0
I2C Bus Interface
The serial controller interface (Single Master) core uses a two-wire bus for communicating between integrated circuits or standard peripherals like sm...
92
1.0
I2C Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)
The Digital Blocks DB-I2C-MS-AXI Controller IP Core interfaces a microprocessor via the AXI system Interconnect Fabric to an I2C Bus. The I2C is a t...
93
1.0
I2C Master and Slave
I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for app...
94
1.0
Serial Controller Interface
Inicore’s iniSCI Slave is a synthesizable, flexible, and structured VHDL implementation of a Serial Controller Interface (SCI) that uses a two-wire bu...
95
1.0
SMBUS & PMBUS Master/Slave controller
The DPSMBUS is a fully-featured module based on the I2C protocol, which supports SMBus and PMBus functionalities. It can operate as a DPSMBUSM – Mast...
96
0.3729
I2C Controller & PHY
DTI I2C Controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C ...
97
0.3729
Dolphin I2S Controller & PHY
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices. The controller is compliant with NXP Inter-IC Sound Bus Specif...
98
0.0
128 Channel Analog Front-End
PMCC_XCM_64X64_A IP block is a 128 channels analog front-end. The IP block consists of 128 variable gain amplifiers (VGAs), 128 2-bit digitizers, bias...
99
0.0
I2C Bus Interface - Master
The I2C is a two-wire, bi-directional serial bus, that provides a simple and efficient method of short distance data transmission between many devices...
100
0.0
I2C Bus Interface - Master with FIFO
The DI2CM-FIFO core provides an interface between a microprocessor/microcontroller and I2C bus. It can work as: a master transmitter or master receive...