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519 IP
501
0.0
SPMI Whitebox Controller IP
This MIPI SPMI 2.0 Peripheral Controller IP implements the device-side functions of the SPMI power-management bus. It supports the two-wire SCLK/SDATA...
502
0.0
CSI2 RX; Camera Serial Interface, MIPI Compliant
The CSI2 Receiver IP Interfaces between Camera module which has the transmitter and the application processor. The CSI2 Receiver IP is fully compliant...
503
0.0
CSI2 TX; Camera Serial Interface, MIPI Compliant
CSI2 – TX is part of HCL’s MIPI® compliant offerings. The CSI2 Transmitter IP supports Pixel Interface on the camera sensor side and the DPHY is suppo...
504
0.0
ST 28FDSOI MIPI DigRF v1.0 Tx/Rx Whitebox PHY
This MIPI DigRF Tx/Rx PHY IP provides a bidirectional physical interface for connecting RFIC and digital-baseband subsystems. The design uses an M-PHY...
505
0.0
Multi-Video-Source Multiplexing Serial Video Transmitter for MIPI CSI2
The SVT-CS4AP2 supports MIPI CSI2 over MIPI D-PHY. It allows mutilplexing of up to 10 video sources into a CSI2 output stream...
506
0.0
Multiplexing transceiver with 4 CSI2 inputs and a single CSI2 output
This IP multiplexes inputs from up to 4 CSI2 cameras, each with up to 4 data lanes, to a single CSI2 output stream, with up to 4 lanes. It comprises o...
507
0.0
Extended MIPI CSI2 Serial Video Receiver, 64 bits, 8 data lanes, 4 pixels/clock
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...
508
0.0
Synopsys Auto-Grade MIPI D-PHY Tx for TSMC N7
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
509
0.0
Synopsys Complete UFS 5.0 solution with UniPro 3.0 + M PHY v6.0 enables Gear6B 46.7 Gb/s, reduced power, and high bandwidth scalability
The Synopsys Universal Flash Storage (UFS) Host Controller IP is a standardbased serial interface engine for implementing the JEDEC UFS interface in c...
510
0.0
Synopsys High speed M PHY v6.0 delivers 46.7 Gb/s Gear6B, enhanced channel robustness, low power modes, and integration with UniPro/UFS
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v6.0 specification, supports speeds up to 46.7 Gbps per lane. The IP ...
511
0.0
Synopsys MIPI C-PHY IP on TSMC N7
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
512
0.0
Synopsys MIPI C-PHY v1.2 / D-PHY v2.1 TX for TSMC N3P
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
513
0.0
Synopsys MIPI C-PHY v1.2 D-PHY v2.1 for TSMC N4P
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
514
0.0
Synopsys MIPI C-PHY v2.0 / D-PHY v2.1 RX IP for TSMC N3P
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
515
0.0
Synopsys MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes for TSMC N5
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
516
0.0
Synopsys MIPI C-PHY v2.0 D-PHY v2.1 TX for TSMC N6
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
517
0.0
Synopsys MIPI M-PHY G5 for TSMC N5
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...
518
0.0
Synopsys MIPI UniPro v3.0 Controller IP
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
519
0.0
Synopsys UFS 4.0 G5 Host Controller with IE and Unipro
The Synopsys Universal Flash Storage (UFS) Host Controller IP is a standardbased serial interface engine for implementing the JEDEC UFS interface in c...
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