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492 IP
101
11.0
MIPI D-PHY
...
102
11.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
103
11.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 22ULL
The MXL-DPHY-CSI-2-TX+-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
104
11.0
MIPI D-PHY DSI RX (Receiver/Peripheral) in UMC 22ULP/22ULL
The MXL-DPHY-DSI-RX-U-22ULP-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
105
11.0
MIPI D-PHY IP 4.5Gbps in TSMC N7
The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
106
11.0
MIPI D-PHY Universal IP in TSMC 28HPC+
The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
107
11.0
MIPI D-PHY Universal IP in UMC 28HPC+
The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...
108
11.0
MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used ...
109
10.0
D-phy 1.2 on tsmc 22nm with ultra low power
Arasan Chip Systems announces the immediate availability its MIPI D-PHY IP supporting speeds of upto 2.5 gbps for TSMC 22nm SoC designs. The MIPI D-...
110
10.0
I3C Device Controller v1.2
The Arasan I3C Device Controller IP Implements Device Controller functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is us...
111
10.0
I3C Dual Controller v1.2
The Arasan I3C Secondary Controller IP Core implements Active controller functionality as defined by the MIPI Alliance’s I3C Specification and Seconda...
112
10.0
I3C Slave Controller
The Arasan I3C Slave Controller IP Core Implements Slave functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for va...
113
10.0
Camera SLVS-EC v.2.0 5.0Gbps / MIPI D-PHY v2-1 4.5Gbps combo Receiver 4-Lane
The CL12822M4R2JM2LIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processer) and DSP. The CL12822M4...
114
10.0
UFS Host Controller IP
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
115
10.0
MIPI CSI-2 Receiver for FPGA
MIPI CSI-2 Rx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processor....
116
10.0
MIPI CSI-2 Transmitter for FPGA
MIPI CSI-2 Tx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processer...
117
10.0
MIPI D-PHY Receiver for TSMC 40nm LP
The Renesas MIPI D-PHY Receiver is useful 2 Data Channel receiver hard macro for CSI-2 of TSMC 40nm LP process....
118
10.0
MIPI D-PHY Transmitter/Receiver for DSI/CSI-2 Samsung 28nm FD-SOI
The Renesas MIPI D-PHY Transmitter/Receiver is useful 4 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of Samsung 28nm FD-SOI process....
119
10.0
MIPI D-PHY Transmitter/Receiver for TSMC 40nm LP
The Renesas MIPI D-PHY Transmitter/Receiver is useful 2 Data Channel transmitter/receiver hard macro for DSI/CSI-2 of TSMC 40nm LP process....
120
10.0
MIPI D-PHY TSMC 130nm
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
121
10.0
MIPI D-PHY TSMC 28nm HPC+ @ 2.5Ghz
The Arasan’s MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Inte...
122
10.0
MIPI DSI-2 Transmit Controller v1.0
The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile host processors using ...
123
10.0
MIPI DSI-2 Transmitter Interface IP
MIPI DSI-2 (Display Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile dev...
124
10.0
MIPI I3C Basic Secondary Controller
The I3C-SC core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Secondary Controller core compliant with the latest MIPI I3C Basi...
125
10.0
MIPI I3C Controller and Target fully featured IP solution
The MIPI I3C Controller IP is a highly optimized and technology-agnostic implementation of the MIPI I3C v.1.1.1 standard targeting both ASIC and F...
126
10.0
MIPI I3C PHY I/O
Arasan’s MIPI I3CⓇ PHY I/O IP, in compliance with MIPI I3CⓇ specifications v1.1. Arasan’s MIPI I3CⓇ PHY IP is part of Arasan’s Total IP Solution for M...
127
10.0
MIPI M-PHY Designed For TSMC 28nm
ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A...
128
10.0
MIPI M-PHY G4 Designed For TSMC 28nm HPC+
ACS-AIP-MPHY-28HPC+ MIPI Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. ...
129
10.0
UniPro 1.6 Host/Device IP
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
130
10.0
UniPro 1.8 Host/Device IP
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
131
10.0
UniPro Controller 2.0 IP (host / device)
The Unified Protocol (UniPro) provides a layered protocol similar to the ISO OSI model. It is designed for high-speed, stable data transfer in mobile ...
132
10.0
Automotive MIPI A-PHY Sink IP (2-Lane)
The CL12912IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking applications in ADAS an...
133
10.0
Automotive MIPI A-PHY Source IP - 1-Lane
The CL12911IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking applications in ADAS an...
134
7.0
MIPI RX controller in SMIC28nm
MIPI RX controller is a mass production IP in SMIC 28nm supported MIPI DSI & DCS protocols....
135
7.0
MIPI RX PHY in SMIC28nm
MIPI RX PHY is a mass production IP for D-PHY v1.2 and C-PHY v1.2 protocols. It includes a total of 5 Lanes, among which there are 4 data lanes and 1...
136
6.0
MIPI D-PHY Receiver with PPI
SP_MIPI_DPHY_RX_PPI _T28HPCP is a MIPI D-PHY Receiver, which complies with MIPI D-PHY specification version 1.2. This D-PHY design receives data from ...
137
6.0
MIPI Rx D-PHY
...
138
5.0
I3C - DI3CM-HCI - MIPI I3C Basic v1.1.1 specifications with Host Controller Interface v1.1 specification
The I3C (Improved Inter-Integrated Circuit) is the successor of the I2C bus. Keeping the best assets from its elder brother, the I3C has major improve...
139
5.0
MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...
140
5.0
MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...
141
5.0
MIPI Compliant D-PHY TSMC 65LP
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
142
5.0
MIPI CSI-2
The MIPI CSI-2 IP core is a highly scalable and silicon-agnostic implementation of the MIPI Camera Serial Interface 2 version 4.1 targeting ASIC and ...
143
5.0
MIPI I3C Basic Target
The I3C-T core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Target controller core suitable for any I3C bus topology & complia...
144
5.0
MIPI RFFE Master IP Core
The MIPI RFFE Master controller IP is a highly optimized and technology agnostic implementation of the MIPI RFFE v.3.1 standard targeting both ASIC an...
145
5.0
MIPI RFFE Slave IP Core
The MIPI RFFE Slave controller IP is a highly optimized and technology and PHY agnostic implementation of the MIPI RFFE v.3.1 standard targeting both ...
146
5.0
MIPI SPMI Controller or Target
The SPMI-CTRL core implements a highly featured, easy-to-use controller for the MIPI System Power Management Interface (MIPI-SPMI) bus. It supports th...
147
5.0
MIPI SPMI Target Controller
The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-Chip (SoC) processor s...
148
5.0
MIPI-I3C Combo Host and Target interface controller IP for Sensor and Peripheral connection
The MIPI I3C (Improved Inter Integrated circuit) is a two wire bidirectional Serial Bus for sensor communication. The MIPI I3C interface has been ...
149
3.0
MIPI 4.1 M-PHY HS Gear 4
MIPI M-PHY HS Gear 4 IP is compliant with the MIPI serial communication protocol for use in mobile systems where performance, power, and efficiency ar...
150
3.0
MIPI D-PHY NEC 90nm
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
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