Design & Reuse
490 IP
301
0.0
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 40 LP
Many production nodes use the C-PHY/D-PHY Combo because it uses the fewest resources and energy. Users can configure the Combo PHY in D-PHY or C-PHY m...
302
0.0
MIPI C/D-PHY Combo Rx IP, Silicon Proven in TSMC 7 FF
Low-power, and low-cost C-PHY/D-PHY Combo in various process nodes. Users are able to configure this Combo PHY into either D-PHY or C-PHY mode to supp...
303
0.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 12 FFC
C-PHY/D-PHY Combo in various process nodes with low power and cost. To support various applications, users can set up this Combo PHY in either D-PHY o...
304
0.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 16 FFC
Low power and cost C-PHY/D-PHY Combo in multiple process nodes. Users can configure this Combo PHY in either D-PHY or C-PHY mode to support a variety ...
305
0.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 22 ULP
C-PHY/D-PHY Combo in numerous process nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-PH...
306
0.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 28 HPC+
C-PHY/D-PHY Combo at low cost and power in several manufacturing nodes. Users have the option of setting this Combo PHY in either D-PHY or C-PHY mode ...
307
0.0
MIPI C/D-PHY Combo Tx IP, Silicon Proven in TSMC 40 LP
C-PHY/D-PHY Combo in various production nodes at low cost and power. To accommodate a range of applications, users can set this Combo PHY in either D-...
308
0.0
MIPI C/D-PHY CSI-2 RX IP
Innosilicon CSI-2 Receiver implements MIPI CSI-2 as well as C/D-PHY protocols. The CSI-2 link protocol specification is a part of group of communicati...
309
0.0
MIPI C/D-PHY RX
The Innosilicon MIPI C/D-PHY RX provides D-PHY and C-PHY in a single IP core. It integrates a compatible PHY that supports high speed data receiver, p...
310
0.0
MIPI C/D-PHY TX
The Innosilicon MIPI C/D PHY TX integrates a MIPI C-PHY and a MIPI D-PHY in a single IP core, which provides a MIPI high speed data plus low-power low...
311
0.0
MIPI CDPHY TX & RX V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...
312
0.0
MIPI CDPHY TX & RX V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...
313
0.0
MIPI CSI-2 Receiver
The Arasan CSI-2 Receiver IP Core functions as a MIPI Camera Serial Interface (CSI-2 Combo) Receiver, which interfaces between a peripheral device (Ca...
314
0.0
MIPI CSI-2 Receiver IP
SmartDV’s MIPI CSI-2 Receiver IP is a silicon-proven solution designed to enable high-speed, low-power camera interfaces across mobile, automotive, Io...
315
0.0
MIPI CSI-2 Receiver v1.3 Controller IP, Compatible with MIPI C-PHY & D-PHY
The CSI-2 Receiver IP is in charge of handling CSI2 & SMIA protocols, as well as depacking input data to pixels. It also selects the correct destinati...
316
0.0
MIPI CSI-2 Receiver v2.0 Controller IP, Compatible with MIPI C-PHY & D-PHY
The CSI-2 Receiver IP is in charge of handling CSI2 & SMIA protocols, as well as depacking input data to pixels. It also selects the correct destinati...
317
0.0
MIPI CSI-2 RX IP
Innosilicon CSI-2 Receiver implements CSI-2 protocol and MIPI D-PHY protocol. The CSI-2 link protocol specification is a part of group of communicatio...
318
0.0
MIPI CSI-2 Transmitter IP
SmartDV’s MIPI CSI-2 Transmitter IP is a silicon-proven solution designed to deliver high-speed, low-power camera data transmission for a variety of a...
319
0.0
MIPI CSI-2 TX IP
Innosilicon CSI-2 Receiver implements CSI-2 protocol and MIPI D-PHY protocol. The CSI-2 link protocol specification is a part of group of communicatio...
320
0.0
MIPI D-PHY UMC 40LL
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
321
0.0
MIPI D-PHY 1.2 TX/RX, 22nm
The MIPI D-PHY Tx IP is compliant with the Display Serial Interface (DSI) with D-PHY signaling up to 2.5GHz. This IP is designed for extreme low power...
322
0.0
MIPI D-PHY 2-Lane CSI-2 TX (Transmitter) in TowerJazz 65nm
The MXL-DPHY-CSI-2-TX-2L-TW-65ISC is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard fo...
323
0.0
MIPI D-PHY 4 Lane CSI-2 TX (Transmitter) in TowerJazz 110nm
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The...
324
0.0
MIPI D-PHY 4-Lane CSI2-TX (Transmitter) in TowerJazz 65nm
The MXL-DPHY-0p2G-CSI-2-TX-T-180BCD is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard ...
325
0.0
MIPI D-PHY Combo LVDS CSI-2 RX IP
Innosilicon CSI-2 Receiver implements CSI-2, MIPI D-PHY, and LVDS protocols. The CSI-2 link protocol specification is a part of group of communication...
326
0.0
MIPI D-PHY Combo LVDS DSI TX IP
Innosilicon MIPI DSI Transmitter implements DSI, MIPI D-PHY, and LVDS protocol. The DSI link protocol specification is a part of group of communicatio...
327
0.0
MIPI D-PHY CSI-2 RX (Receiver) in Samsung 28FDSOI
The MXL-DPHY-CSI-2-RX-SS-28FDSOI is a high- frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI® Alliance Standard f...
328
0.0
MIPI D-PHY CSI-2 RX (Receiver) in TSMC 16FFC
he MXL-DPHY-CSI-2-RX-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification f...
329
0.0
MIPI D-PHY CSI-2 RX (Receiver) in TSMC 28HPC+
The MXL-DPHY-CSI-2-RX-T-28HPC+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...
330
0.0
MIPI D-PHY CSI-2 RX (Receiver) in TSMC 40LP
The MXL-DPHY-CSI-2-RX-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for...
331
0.0
MIPI D-PHY CSI-2 RX (Receiver) in TSMC 65LP
The MXL-DPHY-CSI-2-RX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-P...
332
0.0
MIPI D-PHY CSI-2 RX (Receiver) IP
The MXL-PHY-CSI-2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY. ...
333
0.0
MIPI D-PHY CSI-2 RX IP
Innosilicon CSI-2 Receiver implements MIPI CSI-2 protocol as well as D-PHY protocol. The CSI-2 link protocol specification is a part of group of commu...
334
0.0
MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 28HPM
The MXL-DPHY-CSI-2-RX+-T-28HPM is a high frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard f...
335
0.0
MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 40LP
The MXL-DPHY-CSI-2-RX+-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard fo...
336
0.0
MIPI D-PHY CSI-2 RX+ (Receiver) IP in UMC 40ULP
The MXL-DPHY-CSI-2-RX+-U-40ULP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...
337
0.0
MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+ for Automotive Applications
The MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
338
0.0
MIPI D-PHY CSI-2 TX (Transmitter) 2.5Gbps in TSMC 65LP
The MXL-DPHY-2p5G-CSI-2-TX-T-65LP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
339
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in GlobalFoundries 22FDX
The MXL-DPHY-CSI-2-TX-GF-22FDX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification ...
340
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 22ULL
The MXL-DPHY-CSI-2-TX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
341
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX-T-28HPC+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D...
342
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 40LP
The MXL-DPHY-CSI-2-TX-T-40LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for...
343
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 65LP
The MXL-DPHY-CSI-2-TX-T-65LP is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-P...
344
0.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 65nm
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification for D-PHY...
345
0.0
MIPI D-PHY CSI-2 TX (Transmitter) IP
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY....
346
0.0
MIPI D-PHY CSI-2 TX (Transmitter) IP in TSMC 40ULP
The MXL-DPHY-CSI-2-TX-T-40ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
347
0.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX+-T028HPC+-RF-ULL is a high-frequency low-power, source-synchronous, physical layer supporting the MIPI Alliance Specification fo...
348
0.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP
The MXL-DPHY-CSI-2-TX+-T-40ULP is a high-frequency, low-power, low-cost, source synchronous physical Layer supporting the MIPI Alliance Specification ...
349
0.0
MIPI D-PHY DSI 1.2G RX IP
Innosilicon MIPI DSI receiver implements the MIPI DSI as well as D-PHY protocols. The DSI link protocol specification is a part of group of communicat...
350
0.0
MIPI D-PHY DSI 1.5G RX IP
Innosilicon MIPI DSI RX IP implements the MIPI D-PHY as well as MIPI DSI protocols. The DSI link protocol specification is a part of group of communic...