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222 IP
151
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in UMC 28HPC
This PCIe 3.0 Base Specification-compliant Peripheral Component Interconnect Express Gen3 PHY supports the PIPE 4.3 interface standard. Due to the sup...
152
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in UMC 40LP
This PCIe 3.0 Base Specification-compliant Peripheral Component Interconnect Express Gen3 PHY supports the PIPE 4.3 interface standard. Due to the sup...
153
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in UMC 55SP
The Peripheral Component Interconnect Express Gen3 PHY IP with PIPE 4.3 interface standard supported by this that complies with PCIe 3.0 Base Specific...
154
0.0
PCIe 3.0, 2.1, 1.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support
Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root po...
155
0.0
PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
(PCIe 3.1) x4 PHY IP supports PCIe3.1 transmission. This is compliant with PCIe Rev3 Base Specification with support of PIPE 4.3 interface spec. Input...
156
0.0
PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 40LP
PCIe Gen 3.1 transmission is supported by (PCIe 3.1) x4 PHY IP. With compatibility for PIPE 4.3 interface spec, this complies with PCIe Rev3 Base Spec...
157
0.0
PCIe 3.1/2.1 PHY (6nm, 7nm, 12nm, 14nm, 16nm, 22nm, 28nm, 40nm and 55nm)
M31 PCIe 3.1 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 3.1 IP suppo...
158
0.0
PCIe 4.0 PHY IP for SS 14LPU
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
159
0.0
PCIe 4.0 PHY on 5nm
The PCIe PHY IP consists of hardmacro PMA and softmacro PCS compliant to PCIe Base 4.0 specification. This IP offers a cost-effective and low-power so...
160
0.0
PCIe 4.0 Serdes PHY IP Silicon Proven in TSMC 7nm
The high-bandwidth applications benefit from the low power, multi-lane, and high-performance PCIe 4.0 PHY IP's design. A full variety of PCIe 4.0 Base...
161
0.0
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 4.0 PHY IP delivers high-performance, multi-lane capabilities and a low-power design. A full variety of PCIe...
162
0.0
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
With compatibility for PIPE 4.4 interface protocol, this Peripheral Component Interconnect Express (PCIe) x4 PHY complies with PCIe 4.0 Base Specifica...
163
0.0
PCIe 4.0 Serdes PHY IP, Silicon Proven in UMC 28HPC
With compliance for PIPE 4.4 interface spec, Peripheral Component Interconnect Express (PCIe) Gen4 PHY IP complies with PCIe 4.0 Base Specification. C...
164
0.0
PCIe 4.0 SR PHY in TSMC (N3P, N2P)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
165
0.0
PCIe 4/3/2 SerDes PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...
166
0.0
PCIe 5.0 IP on Samsung SF5
The multi-channel DesignWare® PHY IP for PCI Express® (PCIe®) 5.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands ...
167
0.0
PCIe 5.0 PHY for SF5
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
168
0.0
PCIe 5.0 PHY for TSMC N3P
The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...
169
0.0
PCIe 5.0 PHY for TSMC N7
The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...
170
0.0
PCIe 5.0 PHY IP for TSMC N5
The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s application...
171
0.0
PCIe 5.0 Premium Controller with AXI bridge & Advanced HPC Features (Arm CCA)
The complete silicon-proven DesignWare® IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Securit...
172
0.0
PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 5.0 Base Specification with support of PIPE 5.1 interface spec. Lo...
173
0.0
PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 5.0 PHY IP offers excellent performance, multi-lane capabilities, and low power design. The PCIe 5.0 IP comp...
174
0.0
PCIe 6.0 Controller EP/RP/DM/SW with AMBA bridge & HPC features, including Arm Confidential Compute Architecture
The configurable and scalable Synopsys Controller IP for PCI Express® (PCIe®) 6.0 supports all required features of the PCI Express 6.0 specification...
175
0.0
PCIe 6.0 PHY
Multi-Gigabit/s serial transceivers are fast replacing older parallel interfaces in most of applications. The accelerating demand for higher data rate...
176
0.0
PCIe 6.0 PHY for TSMC N3P
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
177
0.0
PCIe 6.0 PHY for TSMC N6
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
178
0.0
PCIe 6.0 PHY IP for TSMC N3E
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
179
0.0
PCIe 6.0 PHY IP for TSMC N4P
The multi-channel Synopsys PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...
180
0.0
PCIe 6.0 PHY IP for TSMC N5
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
181
0.0
PCIe 6.0 PHY NCS IP for TSMC (N3E, N3P)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
182
0.0
PCIe 6.0 PHY on 4nm
The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.0 specification. This IP offers a cost-effective and low-power so...
183
0.0
PCIe 6.0 PHY on 5nm
The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.0 specification. This IP offers a cost-effective and low-power so...
184
0.0
PCIe 6.2 Switch IP Controller
...
185
0.0
PCIe 7.0 Controller (can be configured to support EP, RP, DM, or SW applications)
The configurable and scalable Synopsys Controller IP for PCI Express® (PCIe®) 7.0 supports all required features of the PCI Express 7.0 specification,...
186
0.0
PCIe 7.0 Controller with AXI
The Rambus PCI Express® (PCIe®) 7.0 Controller with AXI is a configurable and scalable design for ASIC implementations. It is backward compatible to P...
187
0.0
PCIe 7.0 Integrity and Data Encryption (IDE) Security IP Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
188
0.0
PCIe 7.0 PHY for TSMC N5
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
189
0.0
PCIe 7.0 PHY in Samsung (SF4X)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
190
0.0
PCIE Controller IP
PCIE Controller interface provides full support for the PCIE synchronous serial interface, compatible with PCIE 5.0 specification. Through its PCIE co...
191
0.0
PCIe Controller Testbench
PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design. This includes the following features: • R...
192
0.0
PCIE Gen6 digital controller (Dual Mode)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
193
0.0
PCIE Gen6 digital controller (End Point)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
194
0.0
PCIE Gen6 digital controller (Root Complex)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
195
0.0
PCIe GEN6 PHY
Designed for next-generation PCIe systems, the PCIe GEN6 PHY IP supports data rates up to 64GT/s per lane with advanced PAM4 signaling. It ensures eff...
196
0.0
PCIe Gen6.0 Retimer
Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on each side of the Retime...
197
0.0
PCIE Gen7 Controller
Gen7 supports 128Gbps and backward compatible with previous versions of PCIE....
198
0.0
PCIe Multi-Function Option for DMA IP Cores
The PCI Express specification allows endpoints that incorporate several physical PCIe functions that share the same PCIe connection. Such endpoints ar...
199
0.0
PCIe Switch for USB4 Hubs, Hosts and Devices
Rambus PCIe Multi-port Switch for USB4 is a customizable, embedded Switch for PCI Express (PCIe) designed for implementations in USB4 devices. A fully...
200
0.0
PCIe2.0 PHY & Controller
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
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